From: travisutk Date: Sun, 9 May 2010 22:48:09 +0000 (+0000) Subject: Better timing patch, resets until solid connection from list of many BCSTL1/DCOCTL... X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=e192ebab56a698ab6c9822f8667a4a94542a7690 Better timing patch, resets until solid connection from list of many BCSTL1/DCOCTL sets. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@485 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- diff --git a/client/GoodFET.py b/client/GoodFET.py index 518cf47..db192f9 100755 --- a/client/GoodFET.py +++ b/client/GoodFET.py @@ -69,8 +69,9 @@ class GoodFET: return self.symbols.get(name); def timeout(self): print "timeout\n"; - def serInit(self, port=None, timeout=None): + def serInit(self, port=None, timeout=1): """Open the serial port""" + # Make timeout None to wait forever, 0 for non-blocking mode. if port is None and os.environ.get("GOODFET")!=None: glob_list = glob.glob(os.environ.get("GOODFET")); @@ -93,21 +94,23 @@ class GoodFET: timeout=timeout ) - #Explicitly set RTS and DTR to halt board. - self.serialport.setRTS(1); - self.serialport.setDTR(1); - #Drop DTR, which is !RST, low to begin the app. - self.serialport.setDTR(0); - self.serialport.flushInput() - self.serialport.flushOutput() + self.verb=0; + while self.verb!=0x7F: + #Explicitly set RTS and DTR to halt board. + self.serialport.setRTS(1); + self.serialport.setDTR(1); + #Drop DTR, which is !RST, low to begin the app. + self.serialport.setDTR(0); + self.serialport.flushInput() + self.serialport.flushOutput() - #Read and handle the initial command. - #time.sleep(1); - self.readcmd(); #Read the first command. - if(self.verb!=0x7F): - print "Verb %02x is wrong. Incorrect firmware or bad Info guess?" % self.verb; - print "http://goodfet.sf.net/faq/"; - #print "Connected." + #Read and handle the initial command. + #time.sleep(1); + self.readcmd(); #Read the first command. + #if(self.verb!=0x7F): + # print "Verb %02x is wrong. Incorrect firmware or bad Info guess?" % self.verb; + # print "http://goodfet.sf.net/faq/"; + print "Connected." def getbuffer(self,size=0x1c00): writecmd(0,0xC2,[size&0xFF,(size>>16)&0xFF]); print "Got %02x%02x buffer size." % (self.data[1],self.data[0]); diff --git a/firmware/ldscripts/msp430x2274.x b/firmware/ldscripts/msp430x2274.x index 3e21442..92f9dd7 100644 --- a/firmware/ldscripts/msp430x2274.x +++ b/firmware/ldscripts/msp430x2274.x @@ -4,7 +4,7 @@ OUTPUT_ARCH(msp:22) MEMORY { text (rx) : ORIGIN = 0xc000, LENGTH = 0x3fe0 - data (rwx) : ORIGIN = 0x0200, LENGTH = 512 + data (rwx) : ORIGIN = 0x0202, LENGTH = 510 vectors (rw) : ORIGIN = 0xffe0, LENGTH = 32 bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K infomem(rx) : ORIGIN = 0x1000, LENGTH = 256 diff --git a/firmware/ldscripts/msp430x2618.x b/firmware/ldscripts/msp430x2618.x index bf2b555..c03067c 100644 --- a/firmware/ldscripts/msp430x2618.x +++ b/firmware/ldscripts/msp430x2618.x @@ -6,7 +6,8 @@ MEMORY text (rx) : ORIGIN = 0x3100, LENGTH = 0xcec0 fartext(rx) : ORIGIN = 0x10000, LENGTH = 0x10000 /* data (rwx) : ORIGIN = 0x1100, LENGTH = 8192 Top half not on 2619 */ - data (rwx) : ORIGIN = 0x1100, LENGTH = 4096 +/* Leave one word free at 0x1100 and reduce length to that of 2619 */ + data (rwx) : ORIGIN = 0x1102, LENGTH = 4094 vectors (rw) : ORIGIN = 0xffc0, LENGTH = 64 bootloader(rx) : ORIGIN = 0x0c00, LENGTH = 1K infomem(rx) : ORIGIN = 0x1000, LENGTH = 256 diff --git a/firmware/lib/msp430x2618.c b/firmware/lib/msp430x2618.c index 6ad6f9c..b3dae0e 100644 --- a/firmware/lib/msp430x2618.c +++ b/firmware/lib/msp430x2618.c @@ -77,50 +77,32 @@ void setbaud(unsigned char rate){ //! Set the baud rate of the second uart. void setbaud1(unsigned char rate){ - //http://mspgcc.sourceforge.net/baudrate.html - switch(rate){ - case 1://9600 baud - - break; - case 2://19200 baud - break; - case 3://38400 baud - - break; - case 4://57600 baud - - break; - default: - case 5://115200 baud - - break; - } } #define BAUD0EN 0x41 #define BAUD1EN 0x03 void msp430_init_uart(){ - + // Serial on P3.4, P3.5 P3SEL |= BIT4 + BIT5; P3DIR |= BIT4; - + //UCA0CTL1 |= UCSWRST; /* disable UART */ - + UCA0CTL0 = 0x00; //UCA0CTL0 |= UCMSB ; - + UCA0CTL1 |= UCSSEL_2; // SMCLK - + //UCA0BR0 = BAUD0EN; // 115200 //UCA0BR1 = BAUD1EN; setbaud(5);//default baud, 115200 - + UCA0MCTL = 0; // Modulation UCBRSx = 5 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** - - + + //Leave this commented! //Interrupt is handled by target code, not by bootloader. //IE2 |= UCA0RXIE; @@ -140,6 +122,7 @@ CALDCO_16MHZ 0x96 CALBC1_16MHZ 0x8f 2619-001.txt //! Initialize the MSP430 clock. void msp430_init_dco() { + char *choice=(char *) 0x200; //First word of RAM. #ifdef __MSP430_HAS_PORT8__ P8SEL = 0; // disable XT2 on P8.7/8 #endif @@ -150,19 +133,26 @@ void msp430_init_dco() { DCOCTL = CALDCO_16MHZ; }else{ //Info is missing, guess at a good value. - switch(*((int*)0xff0)){ + #define CHOICES 4 + DCOCTL = 0x00; //clear DCO + switch(choice[0]++%CHOICES){ default: - case 0x6ff2: //f26f, the MSP430F2618 - DCOCTL = 0x00; - #ifndef DCOVAL - #define DCOVAL 0x8f - #endif - BCSCTL1 = DCOVAL; //CALBC1_16MHZ at 0x10f9 - /** Observed DCOCTL values: - 2618: 7f, 97 - */ + case 0: + BCSCTL1 = 0x8f; //CALBC1_16MHZ at 0x10f9 DCOCTL = 0x83; //CALDCO_16MHZ at 0x10f8 break; + case 1: + BCSCTL1 = 0x8f; + DCOCTL = 0x95; + break; + case 2: + BCSCTL1 = 0x8f; + DCOCTL = 0x6c; + break; + case 3: + BCSCTL1 = 0x8e; + DCOCTL = 0xdc; + break; } }