From: travisutk <travisutk@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Date: Wed, 4 Nov 2009 07:34:29 +0000 (+0000)
Subject: SPI stuff, cleaned whitespace.
X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=ed7afb6af8b3831d61a8ef6cba7592f17592af72

SPI stuff, cleaned whitespace.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@222 12e2690d-a6be-4b82-a7b7-67c4a43b65c8
---

diff --git a/client/goodfet.spiflash b/client/goodfet.spiflash
index d4450c2..21a1efb 100755
--- a/client/goodfet.spiflash
+++ b/client/goodfet.spiflash
@@ -144,11 +144,7 @@ if(sys.argv[1]=="flash"):
 
     i=start;
     chars=list(file.read());
-    
-    #N.B., chunksize must be an even fraction of 0x100.
-    #Increasing above 0x200 doesn't help, 0x100 might be good enough.
     chunksize=0x100;
-    #chunksize=0x1000;
     
     while i<=stop:
         bytes=range(0,chunksize);
diff --git a/firmware/lib/msp430x2618.c b/firmware/lib/msp430x2618.c
index 7823f06..9409f56 100644
--- a/firmware/lib/msp430x2618.c
+++ b/firmware/lib/msp430x2618.c
@@ -102,28 +102,28 @@ void setbaud1(unsigned char rate){
 
 void msp430_init_uart(){
 
-  // Serial on P3.4, P3.5                                                                                                                                                 
+  // Serial on P3.4, P3.5
   P3SEL |= BIT4 + BIT5;
   P3DIR |= BIT4;
 
-  //UCA0CTL1 |= UCSWRST;                    /* disable UART */                                                                                                            
+  //UCA0CTL1 |= UCSWRST;                    /* disable UART */
 
   UCA0CTL0 = 0x00;
-  //UCA0CTL0 |= UCMSB ;                                                                                                                                                   
-  UCA0CTL1 |= UCSSEL_2;                     // SMCLK                                                                                                                      
+  //UCA0CTL0 |= UCMSB ;
 
-  //UCA0BR0 = BAUD0EN;                        // 115200                                                                                                                     
+  UCA0CTL1 |= UCSSEL_2;                     // SMCLK
+
+  //UCA0BR0 = BAUD0EN;                        // 115200
   //UCA0BR1 = BAUD1EN;
   setbaud(5);//default baud, 115200
 
-  UCA0MCTL = 0;                             // Modulation UCBRSx = 5                                                                                                      
-  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**                                                                                          
-
+  UCA0MCTL = 0;                             // Modulation UCBRSx = 5
+  UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
 
-  //Leave this commented!                                                                                                                                                 
-  //Interrupt is handled by target code, not by bootloader.                                                                                                               
-  //IE2 |= UCA0RXIE;         
 
+  //Leave this commented!
+  //Interrupt is handled by target code, not by bootloader.
+  //IE2 |= UCA0RXIE;
 }
 
 //! Initialize the MSP430 clock.