From: dodge-this Date: Fri, 9 Nov 2012 20:44:36 +0000 (+0000) Subject: JTAGARM7 is back up and running, folks! Tested Halt/Release, Get/Set Registers,... X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=f7fdc48f01ada713d5034763a2f3395fe2a7c51b JTAGARM7 is back up and running, folks! Tested Halt/Release, Get/Set Registers, Read/Write Memory. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@1327 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- diff --git a/client/GoodFETARM7.py b/client/GoodFETARM7.py index 206c820..01e929c 100644 --- a/client/GoodFETARM7.py +++ b/client/GoodFETARM7.py @@ -32,9 +32,10 @@ IR_SHIFT = 0x80 DR_SHIFT = 0x81 RESETTAP = 0x82 RESETTARGET = 0x83 -GET_REGISTER = 0x87 -SET_REGISTER = 0x88 -DEBUG_INSTR = 0x89 +DR_SHIFT_MORE = 0x87 +GET_REGISTER = 0x8d +SET_REGISTER = 0x8e +DEBUG_INSTR = 0x8f # Really ARM specific stuff WAIT_DBG = 0x91 CHAIN0 = 0x93 @@ -228,7 +229,10 @@ class GoodFETARM(GoodFET): self.writecmd(0x13,IR_SHIFT,2, [IR, LSB|noretidle]) return self.data def ARMshift_DR(self, data, bits, flags): - self.writecmd(0x13,DR_SHIFT,8,[bits&0xff, flags&0xff, 0, 0, data&0xff,(data>>8)&0xff,(data>>16)&0xff,(data>>24)&0xff]) + self.writecmd(0x13,DR_SHIFT,14,[bits&0xff, flags&0xff, 0, 0, data&0xff,(data>>8)&0xff,(data>>16)&0xff,(data>>24)&0xff, (data>>32)&0xff,(data>>40)&0xff,(data>>48)&0xff,(data>>56)&0xff,(data>>64)&0xff,(data>>72)&0xff]) + return self.data + def ARMshift_DR_more(self, data, bits, flags): + self.writecmd(0x13,DR_SHIFT_MORE,14,[bits&0xff, flags&0xff, 0, 0, data&0xff,(data>>8)&0xff,(data>>16)&0xff,(data>>24)&0xff, (data>>32)&0xff,(data>>40)&0xff,(data>>48)&0xff,(data>>56)&0xff,(data>>64)&0xff,(data>>72)&0xff]) return self.data def ARMwaitDBG(self, timeout=0xff): self.current_dbgstate = self.ARMget_dbgstate() diff --git a/firmware/Makefile b/firmware/Makefile index c77467e..bc24bc3 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -37,11 +37,11 @@ CC =$(GCC) -Wall -O1 -fno-strict-aliasing -g $(CCEXTRA) # ALPHA: # jtag430 -- 16-bit MSP430 JTAG # jtag430x2 -- 20-bit MSP430 JTAG +# jtagarm7 -- ARM7TDMI JTAG # PRE-ALPHA: # Bus protocols: # i2c -- Turns GF into USB-to-i2c adapter -# jtagarm7 -- ARM7TDMI JTAG # ejtag -- MIPS JTAG # jtagxscale -- XScale JTAG # openocd -- OpenOCD bitbang device diff --git a/firmware/apps/jtag/jtagarm7.c b/firmware/apps/jtag/jtagarm7.c index 6587de1..2a16421 100644 --- a/firmware/apps/jtag/jtagarm7.c +++ b/firmware/apps/jtag/jtagarm7.c @@ -33,7 +33,6 @@ unsigned long last_instr = -1; unsigned char last_sysstate = 0; unsigned char last_ir = -1; unsigned char last_scanchain = -1; -unsigned char tapstate = 15; unsigned char current_dbgstate = -1; //unsigned char last_halt_debug_state = -1; //unsigned long last_halt_pc = -1; @@ -92,7 +91,6 @@ u8 jtagarm_shift_ir(u8 ir, u8 flags){ jtag_capture_ir(); jtag_shift_register(); retval = jtag_trans_n(ir, 4, LSB|flags); - tapstate = RunTest_Idle; last_ir = ir; } return retval; @@ -113,7 +111,6 @@ state” to the “Select DR” state each time the “Update” state is reache jtag_capture_dr(); jtag_shift_register(); retval = jtag_trans_n(chain, 4, LSB | NORETIDLE); - tapstate = Update_DR; } jtagarm_shift_ir(testmode, NORETIDLE); return(retval); @@ -130,7 +127,6 @@ unsigned long eice_write(unsigned char reg, unsigned long data){ retval = jtag_trans_n(data, 32, LSB| NOEND| NORETIDLE); // send in the data - 32-bits lsb temp = jtag_trans_n(reg, 5, LSB| NOEND| NORETIDLE); // send in the register address - 5 bits lsb jtag_trans_n(1, 1, LSB); // send in the WRITE bit - tapstate = RunTest_Idle; return(retval); } @@ -145,7 +141,6 @@ unsigned long eice_read(unsigned char reg){ // PROVEN jtag_capture_dr(); jtag_shift_register(); // Now shift out the 32 bits retval = jtag_trans_n(0L, 32, LSB); // atmel arm jtag docs pp.10-11: LSB first - tapstate = RunTest_Idle; return(retval); } @@ -153,15 +148,19 @@ unsigned long eice_read(unsigned char reg){ // PROVEN //! push an instruction into the pipeline unsigned long jtagarm7tdmi_instr_primitive(unsigned long instr, char breakpt){ // PROVEN unsigned long retval = 0; + //debugstr("jtagarm7tdmi_instr_primitive"); jtagarm7tdmi_scan(1, ARM7TDMI_IR_INTEST); + //debugstr("instruction:"); //debughex32(instr); - if (last_instr != instr && last_sysstate != breakpt){ + //if (!(last_instr == instr && last_sysstate == breakpt)) + { jtag_capture_dr(); jtag_shift_register(); // if the next instruction is to run using MCLK (master clock), set TDI if (breakpt) { + //debugstr("--breakpt flag set"); SETMOSI; } else @@ -172,16 +171,20 @@ unsigned long jtagarm7tdmi_instr_primitive(unsigned long instr, char breakpt){ // Now shift in the 32 bits retval = jtag_trans_n(instr, 32, 0); // Must return to RUN-TEST/IDLE state for instruction to enter pipeline, and causes debug clock. - tapstate = RunTest_Idle; + //debugstr("hot off the pipeline!"); + //debughex32(retval); last_instr = instr; last_sysstate = breakpt; - } else - jtag_tcktock(); + }// else + //{ // this assumes we don't want retval! wtfo!? + // jtag_tcktock(); + //} return(retval); } u32 jtagarm7tdmi_nop(u8 brkpt){ // WARNING: current_dbgstate must be up-to-date before calling this function!!!!! + //debugstr("jtagarm7tdmi_nop"); if (current_dbgstate & JTAG_ARM7TDMI_DBG_TBIT) return jtagarm7tdmi_instr_primitive(THUMB_INSTR_NOP, brkpt); return jtagarm7tdmi_instr_primitive(ARM_INSTR_NOP, brkpt); @@ -191,6 +194,7 @@ u32 jtagarm7tdmi_nop(u8 brkpt){ //! Retrieve a 32-bit Register value unsigned long jtagarm7_get_reg_prim(unsigned long instr){ + //debugstr("jtagarm7_get_reg_prim"); jtagarm7tdmi_nop( 0); jtagarm7tdmi_instr_primitive(instr, 0); jtagarm7tdmi_nop( 0); @@ -220,10 +224,8 @@ void jtagarm7_thumb_swap_reg(unsigned char dir, unsigned long reg){ jtagarm7tdmi_nop( 0); if (dir){ jtagarm7tdmi_instr_primitive((unsigned long)(THUMB_INSTR_MOV_LoHi | (reg) | (reg<<16)), 0); - //debughex32((unsigned long)(THUMB_INSTR_MOV_LoHi | (reg) | (reg<<16))); } else { jtagarm7tdmi_instr_primitive((unsigned long)(THUMB_INSTR_MOV_HiLo | (reg<<3) | (reg<<19)), 0); - //debughex32((unsigned long)(THUMB_INSTR_MOV_HiLo | (reg<<3) | (reg<<19))); } jtagarm7tdmi_nop( 0); jtagarm7tdmi_nop( 0); @@ -233,6 +235,9 @@ void jtagarm7_thumb_swap_reg(unsigned char dir, unsigned long reg){ unsigned long jtagarm7tdmi_get_register(unsigned long reg) { // PROVEN - 100827 unsigned long retval=0L, instr, r0; current_dbgstate = eice_read(EICE_DBGSTATUS); + //debugstr("current_dbgstate:"); + //debughex32(current_dbgstate); + if (current_dbgstate & JTAG_ARM7TDMI_DBG_TBIT){ if (reg > 7){ //debugstr("debug: jtagarm7tdmi_get_register: thumb reg > 15"); @@ -243,10 +248,14 @@ unsigned long jtagarm7tdmi_get_register(unsigned long reg) { jtagarm7_set_reg_prim( THUMB_WRITE_REG, 0, r0); // restore r0 return retval; } else { + //debugstr("debug: jtagarm7tdmi_get_register: thumb reg < 15"); instr = (unsigned long)(THUMB_READ_REG | (unsigned long)reg | (unsigned long)(reg<<16L)); } } else + { + //debugstr("debug: jtagarm7tdmi_get_register: arm"); instr = (reg<<12L) | ARM_READ_REG; // STR Rx, [R14] + } return jtagarm7_get_reg_prim(instr); } @@ -302,9 +311,37 @@ void jtagarm7_handle_fn( uint8_t const app, case JTAG_DR_SHIFT: jtag_capture_dr(); jtag_shift_register(); - cmddatalong[0] = jtag_trans_n(cmddatalong[1],cmddata[0],cmddata[1]); - tapstate = (cmddata[1]&NORETIDLE)>0?Update_DR:RunTest_Idle; - txdata(app,verb,4); + val = cmddata[0]; + if (cmddata[0] > 32) + { + debughex32(cmddatalong[0]); + debughex32(cmddatalong[1]); + cmddatalong[1] = jtag_trans_n(cmddatalong[2], val - 32 ,cmddata[1] | NOEND |NORETIDLE); + cmddatalong[0] = jtag_trans_n(cmddatalong[2], 32, cmddata[1]); + } + else + { + debughex32(cmddatalong[0]); + cmddatalong[0] = jtag_trans_n(cmddatalong[1], val, cmddata[1]); + } + txdata(app,verb,val/8); + break; + case JTAG_DR_SHIFT_MORE: + // assumes you just executed JTAG_DR_SHIFT with NOEND flag set + val = cmddata[0]; + if (cmddata[0] > 32) + { + debughex32(cmddatalong[0]); + debughex32(cmddatalong[1]); + cmddatalong[1] = jtag_trans_n(cmddatalong[2], val - 32 ,cmddata[1] | NOEND |NORETIDLE); + cmddatalong[0] = jtag_trans_n(cmddatalong[2], 32, cmddata[1]); + } + else + { + debughex32(cmddatalong[0]); + cmddatalong[0] = jtag_trans_n(cmddatalong[1], val, cmddata[1]); + } + txdata(app,verb,val/8); break; case JTAGARM7_CHAIN0: jtagarm7tdmi_scan(0, ARM7TDMI_IR_INTEST); @@ -318,7 +355,6 @@ void jtagarm7_handle_fn( uint8_t const app, cmddatalong[2] = jtag_trans_n(cmddataword[4], 9, MSB| NOEND| NORETIDLE); cmddatalong[1] = jtag_trans_n(cmddatalong[1], 32, MSB| NOEND| NORETIDLE); cmddatalong[3] = jtag_trans_n(cmddatalong[3], 32, MSB); - tapstate = RunTest_Idle; txdata(app,verb,16); break; case JTAGARM7_SCANCHAIN1: @@ -346,9 +382,9 @@ void jtagarm7_handle_fn( uint8_t const app, case JTAG_RESET_TARGET: //FIXME: BORKEN debugstr("RESET TARGET"); - CLRTST; + CLRRST; delay(cmddataword[0]); - SETTST; + SETRST; txdata(app,verb,4); break; diff --git a/firmware/config.mk b/firmware/config.mk index dbe7f99..d9c077c 100644 --- a/firmware/config.mk +++ b/firmware/config.mk @@ -24,7 +24,7 @@ mcu ?= msp430f1611 platform := goodfet endif -ifneq (,$(findstring $(board),goodfet21)) +ifneq (,$(findstring $(board),goodfet21,goodfet22)) mcu ?= msp430f2618 platform := goodfet endif @@ -181,7 +181,7 @@ CONFIG_sbw ?= n CONFIG_jtag430 ?= y CONFIG_jtag430x2 ?= y CONFIG_i2c ?= n -CONFIG_jtagarm7 ?= n +CONFIG_jtagarm7 ?= y CONFIG_ejtag ?= n CONFIG_jtagxscale ?= n CONFIG_openocd ?= y diff --git a/firmware/include/jtag.h b/firmware/include/jtag.h index 5baaf29..e7a8c90 100644 --- a/firmware/include/jtag.h +++ b/firmware/include/jtag.h @@ -147,6 +147,7 @@ extern int savedtclk; #define JTAG_DETECT_IR_WIDTH 0x84 #define JTAG_DETECT_CHAIN_LENGTH 0x85 #define JTAG_GET_DEVICE_ID 0x86 +#define JTAG_DR_SHIFT_MORE 0x87 // used for shiftings > 32bits. assumes JTAG_DR_SHIFT with NOEND first //#define JTAG_DR_SHIFT20 0x91 extern app_t const jtag_app; diff --git a/firmware/include/jtagarm7.h b/firmware/include/jtagarm7.h index 41ba258..40338bf 100644 --- a/firmware/include/jtagarm7.h +++ b/firmware/include/jtagarm7.h @@ -102,9 +102,9 @@ The least significant bit of the instruction register is scanned in and scanned //JTAGARM7TDMI commands -#define JTAGARM7_GET_REGISTER 0x87 -#define JTAGARM7_SET_REGISTER 0x88 -#define JTAGARM7_DEBUG_INSTR 0x89 +#define JTAGARM7_GET_REGISTER 0x8d +#define JTAGARM7_SET_REGISTER 0x8e +#define JTAGARM7_DEBUG_INSTR 0x8f // Really ARM specific stuff #define JTAGARM7_SET_IR 0x90 #define JTAGARM7_WAIT_DBG 0x91