From: travisutk Date: Fri, 24 Dec 2010 00:19:00 +0000 (+0000) Subject: Reflex frame jamming, got some troubles. X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=f9fa242f4cd7c7ad6ff7f2a603d77e721595a7ac Reflex frame jamming, got some troubles. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@796 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- diff --git a/shellcode/chipcon/cc1110/Makefile b/shellcode/chipcon/cc1110/Makefile index 7790b04..309fed8 100644 --- a/shellcode/chipcon/cc1110/Makefile +++ b/shellcode/chipcon/cc1110/Makefile @@ -8,7 +8,7 @@ # Use lower RAM if needed. CC=sdcc --code-loc 0xF000 -objs=crystal.ihx txpacket.ihx rxpacket.ihx txrxpacket.ihx reflex.ihx rxpacketp25.ihx reflexframe.ihx +objs=crystal.ihx txpacket.ihx rxpacket.ihx txrxpacket.ihx reflex.ihx rxpacketp25.ihx reflexframe.ihx carrier.ihx all: $(objs) diff --git a/shellcode/chipcon/cc1110/reflex.c b/shellcode/chipcon/cc1110/reflex.c index ced2f90..4656bd7 100644 --- a/shellcode/chipcon/cc1110/reflex.c +++ b/shellcode/chipcon/cc1110/reflex.c @@ -3,56 +3,143 @@ char __xdata at 0xfe00 packet[256] ; +void carrier(){ + // Set the system clock source to HS XOSC and max CPU speed, + // ref. [clk]=>[clk_xosc.c] + SLEEP &= ~SLEEP_OSC_PD; + while( !(SLEEP & SLEEP_XOSC_S) ); + CLKCON = (CLKCON & ~(CLKCON_CLKSPD | CLKCON_OSC)) | CLKSPD_DIV_1; + while (CLKCON & CLKCON_OSC); + SLEEP |= SLEEP_OSC_PD; + + + /* Setup radio with settings from SmartRF® Studio. The default settings are + * used, except that "unmodulated" is chosen in the "Simple RX tab". This + * results in an umodulated carrier with a frequency of approx. 2.433 GHz. + */ + FSCTRL1 = 0x0A; // Frequency synthesizer control. + FSCTRL0 = 0x00; // Frequency synthesizer control. + + + + MDMCFG4 = 0x86; // Modem configuration. + MDMCFG3 = 0x83; // Modem configuration. + MDMCFG2 = 0x30; // Modem configuration. + MDMCFG1 = 0x22; // Modem configuration. + MDMCFG0 = 0xF8; // Modem configuration. + CHANNR = 0x00; // Channel number. + DEVIATN = 0x00; // Modem deviation setting (when FSK modulation is enabled). + FREND1 = 0x56; // Front end RX configuration. + FREND0 = 0x10; // Front end RX configuration. + MCSM0 = 0x14; // Main Radio Control State Machine configuration. + FOCCFG = 0x16; // Frequency Offset Compensation Configuration. + BSCFG = 0x6C; // Bit synchronization Configuration. + AGCCTRL2 = 0x03; // AGC control. + AGCCTRL1 = 0x40; // AGC control. + AGCCTRL0 = 0x91; // AGC control. + FSCAL3 = 0xE9; // Frequency synthesizer calibration. + FSCAL2 = 0x2a; // Frequency synthesizer calibration. + FSCAL1 = 0x00; // Frequency synthesizer calibration. + FSCAL0 = 0x1f; // Frequency synthesizer calibration + + TEST2 = 0x88; // Various test settings. + TEST1 = 0x31; // Various test settings. + TEST0 = 0x09; // Various test settings. + + //FE is too high + PA_TABLE0 = 0xFF; // PA output power setting. + PKTCTRL1 = 0x04; // Packet automation control. + PKTCTRL0 = 0x22; // Packet automation control. + ADDR = 0x00; // Device address. + PKTLEN = 0xFF; // Packet length. + + /* Settings not from SmartRF® Studio. Setting both sync word registers to + * 0xAA = 0b10101010, i.e., the same as the preamble pattern. Not necessary, + * but gives control of what the radio attempts to transmit. + */ + SYNC1 = 0xAA; + SYNC0 = 0xAA; + + /* Put radio in TX. + RFST = RFST_STX; + while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX); + */ + + +#define RFON RFST = RFST_SIDLE; RFST = RFST_STX; while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX); +#define RFOFF RFST = RFST_SIDLE; //while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_IDLE); + //RFON; + //while(1); + + +} + + void sleepMillis(int ms) { - int j; - while (--ms > 0) { - for (j=0; j<1200;j++); // about 1 millisecond - }; + int j,k; + //k=1000; + //while(--k>0) + while (--ms > 0) { + for (j=0; j<1200;j++); // about 1 millisecond + }; } //! Reflexively jam on the present channel by responding to a signal with a carrier wave. void main(){ unsigned char threshold=packet[0], i=0, rssi=0;; - - //Disable interrupts. RFTXRXIE=0; - - //idle a bit. - //RFST=RFST_SIDLE; - //while(MARCSTATE!=MARC_STATE_IDLE); + + carrier(); + sleepMillis(10); + //RFON; + while(1){ + + + //RFOFF; + + //Wait for the transmission. RFST=RFST_SRX; while(MARCSTATE!=MARC_STATE_RX); rssi=0; + + //Wait for RSSI to settle. - sleepMillis(10); + sleepMillis(100); + //RFOFF; + + //Delay until the RSSI is above the threshold. while(rssi[clk_xosc.c] + SLEEP &= ~SLEEP_OSC_PD; + while( !(SLEEP & SLEEP_XOSC_S) ); + CLKCON = (CLKCON & ~(CLKCON_CLKSPD | CLKCON_OSC)) | CLKSPD_DIV_1; + while (CLKCON & CLKCON_OSC); + SLEEP |= SLEEP_OSC_PD; + + + /* Setup radio with settings from SmartRF® Studio. The default settings are + * used, except that "unmodulated" is chosen in the "Simple RX tab". This + * results in an umodulated carrier with a frequency of approx. 2.433 GHz. + */ + FSCTRL1 = 0x0A; // Frequency synthesizer control. + FSCTRL0 = 0x00; // Frequency synthesizer control. + + + + MDMCFG4 = 0x86; // Modem configuration. + MDMCFG3 = 0x83; // Modem configuration. + MDMCFG2 = 0x30; // Modem configuration. + MDMCFG1 = 0x22; // Modem configuration. + MDMCFG0 = 0xF8; // Modem configuration. + CHANNR = 0x00; // Channel number. + DEVIATN = 0x00; // Modem deviation setting (when FSK modulation is enabled). + FREND1 = 0x56; // Front end RX configuration. + FREND0 = 0x10; // Front end RX configuration. + MCSM0 = 0x14; // Main Radio Control State Machine configuration. + FOCCFG = 0x16; // Frequency Offset Compensation Configuration. + BSCFG = 0x6C; // Bit synchronization Configuration. + AGCCTRL2 = 0x03; // AGC control. + AGCCTRL1 = 0x40; // AGC control. + AGCCTRL0 = 0x91; // AGC control. + FSCAL3 = 0xE9; // Frequency synthesizer calibration. + FSCAL2 = 0x2a; // Frequency synthesizer calibration. + FSCAL1 = 0x00; // Frequency synthesizer calibration. + FSCAL0 = 0x1f; // Frequency synthesizer calibration + + TEST2 = 0x88; // Various test settings. + TEST1 = 0x31; // Various test settings. + TEST0 = 0x09; // Various test settings. + + //FE is too high + PA_TABLE0 = 0xFF; // PA output power setting. + PKTCTRL1 = 0x04; // Packet automation control. + PKTCTRL0 = 0x22; // Packet automation control. + ADDR = 0x00; // Device address. + PKTLEN = 0xFF; // Packet length. + + /* Settings not from SmartRF® Studio. Setting both sync word registers to + * 0xAA = 0b10101010, i.e., the same as the preamble pattern. Not necessary, + * but gives control of what the radio attempts to transmit. + */ + SYNC1 = 0xAA; + SYNC0 = 0xAA; + + /* Put radio in TX. + RFST = RFST_STX; + while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX); + */ + + +#define RFON RFST = RFST_SIDLE; RFST = RFST_STX; while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_TX); +#define RFOFF RFST = RFST_SIDLE; //while ((MARCSTATE & MARCSTATE_MARC_STATE) != MARC_STATE_IDLE); + //RFON; + //while(1); + + +} + void sleepMillis(int ms) { int j; @@ -12,6 +83,8 @@ void sleepMillis(int ms) { //! Wait for a packet to come, then immediately return. void rxwait(){ + int i=0; + //Disable interrupts. RFTXRXIE=0; @@ -19,22 +92,39 @@ void rxwait(){ RFST=RFST_SIDLE; while(MARCSTATE!=MARC_STATE_IDLE); + sleepMillis(10); //Begin to receive. RFST=RFST_SRX; while(MARCSTATE!=MARC_STATE_RX); + //while(MARCSTATE!=MARC_STATE_RX_OVERFLOW); + - //Incoming! Return to let the jammer handle things. + //Incoming! + /* + //Fixed length + packet[i++]=PKTLEN; + while(i