From: travisutk <travisutk@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Date: Sun, 7 Mar 2010 19:10:52 +0000 (+0000)
Subject: Cleaning up the glitching scripts.
X-Git-Url: http://git.rot13.org/?p=goodfet;a=commitdiff_plain;h=fa0f91bb0af90149c2502c3e2c0ad06516d28a49;ds=sidebyside

Cleaning up the glitching scripts.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@393 12e2690d-a6be-4b82-a7b7-67c4a43b65c8
---

diff --git a/client/GoodFETAVR.py b/client/GoodFETAVR.py
index f8189bf..30354cd 100644
--- a/client/GoodFETAVR.py
+++ b/client/GoodFETAVR.py
@@ -116,7 +116,8 @@ class GoodFETAVR(GoodFET):
         """Read the target's lockbits."""
         self.writecmd(self.AVRAPP,0x92,1,[bits]);
         return self.lockbits();
-    
+    def lock(self):
+        self.setlockbits(0xFC);
     def eeprompeek(self, adr):
         """Read a byte of the target's EEPROM."""
         self.writecmd(self.AVRAPP,0x81 ,2,
diff --git a/firmware/apps/avr/avr.c b/firmware/apps/avr/avr.c
index 53d9f30..9531563 100644
--- a/firmware/apps/avr/avr.c
+++ b/firmware/apps/avr/avr.c
@@ -24,18 +24,18 @@ void avrconnect(){
   avrsetup(); //Cut this?
   
   SETSS;
-  delay(50);
+  //delay(50);
   
   //Pulse !RST (SS) at least twice while CLK is low.
   CLRCLK;
   CLRSS;
-  delay(5);
+  //delay(5);
 
   SETSS;
   CLRCLK;
-  delay(5);
+  //delay(5);
   CLRSS;
-  delay(5);
+  //delay(5);
   
   //Enable programming
   avr_prgen();
diff --git a/firmware/apps/glitch/glitch.c b/firmware/apps/glitch/glitch.c
index 1962190..8b43594 100644
--- a/firmware/apps/glitch/glitch.c
+++ b/firmware/apps/glitch/glitch.c
@@ -56,7 +56,7 @@ interrupt(TIMERA0_VECTOR) Timer_A (void){
   P5OUT^=BIT7;//Normal
   
   //This oughtn't be necessary, but glitches repeat without it.
-  //TACTL=0; //disable counter.
+  TACTL=0; //disable counter.
   
   //P5OUT^=BIT7;//Normal
   return;
@@ -138,13 +138,14 @@ void glitchhandle(unsigned char app,
     break;
   case START:
     //Testing mode, for looking at the glitch waveform.
-    glitchvoltages(0xFFF,0);//Inverted VCC and GND.
+    glitchvoltages(0,0xFFF);//Minimum glitch, for noise test.
+    //glitchvoltages(0,0);//Drop VCC
+    //glitchvoltages(0xFFF,0xFFF);//Raise Ground
     P5OUT|=BIT7;//Normal
     P5DIR|=BIT7;
     while(1){
       P5OUT&=~BIT7;//Glitch
-      //asm("nop");//asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");
-      //asm("nop"); //Not necessary.
+      //asm("nop"); //Not Necessary
       P5OUT|=BIT7;//Normal
       asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");
       asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");asm("nop");