From 022d9128fe8a5783e3b804581fe7996d17095ef6 Mon Sep 17 00:00:00 2001
From: travisutk <travisutk@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Date: Sun, 6 Feb 2011 02:19:49 +0000
Subject: [PATCH] GoodFET firmware on the Telos B reveals the Flash chip.
 CC2420 coming next!

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@890 12e2690d-a6be-4b82-a7b7-67c4a43b65c8
---
 firmware/apps/radios/ccspi.c | 10 ++--------
 firmware/platforms/telosb.h  | 33 +++++++++++++++++++--------------
 2 files changed, 21 insertions(+), 22 deletions(-)

diff --git a/firmware/apps/radios/ccspi.c b/firmware/apps/radios/ccspi.c
index 74dde4f..ff46616 100644
--- a/firmware/apps/radios/ccspi.c
+++ b/firmware/apps/radios/ccspi.c
@@ -46,10 +46,6 @@ app_t const ccspi_app = {
 	"\tmust be moved into the client.\n"
 };
 
-
-#define RADIOACTIVE CLRCE
-#define RADIOPASSIVE SETCE
-
 //! Set up the pins for CCSPI mode.
 void ccspisetup(){
   SPIDIR&=~MISO;
@@ -57,10 +53,8 @@ void ccspisetup(){
   DIRSS;
   DIRCE;
   
-  //Telos B Radio VReg Enable
-  P4DIR|=BIT5+BIT2+BIT6+BIT7;
-  P4OUT|=BIT5+BIT7;
-  P4OUT&=~(BIT6+BIT2);
+  P4OUT|=BIT5; //activate CC2420 voltage regulator
+  P4OUT|=BIT6; //bring CC2420 out of reset
   
   //Begin a new transaction.
   CLRSS; 
diff --git a/firmware/platforms/telosb.h b/firmware/platforms/telosb.h
index 235faee..ff030cc 100644
--- a/firmware/platforms/telosb.h
+++ b/firmware/platforms/telosb.h
@@ -22,11 +22,6 @@
 #define SPIDIR P3DIR
 #define SPIIN  P3IN
 #define SPIREN P3REN
- 
-#define P5OUT P3OUT
-#define P5DIR P3DIR
-#define P5IN  P3IN
-#define P5REN P3REN
 
 
 /* For the radio to be used:
@@ -36,21 +31,31 @@
 */
 
 #define INITPLATFORM \
-  P4DIR|=BIT6+BIT5+BIT2+BIT7+BIT4; \
-  P4OUT=BIT5;
+  P1DIR = 0xe0;\
+  P1OUT = 0x00;\
+  P2DIR = 0x7b;\
+  P2OUT = 0x10;\
+  P3DIR = 0xf1;\
+  P3OUT = 0x00;\
+  P4DIR = 0xfd;\
+  P4OUT = 0xdd;\
+  P5DIR = 0xff;\
+  P5OUT = 0xff;\
+  P6DIR = 0xff;\
+  P6OUT = 0x00;
 
 //Radio CS is P4.2
-#define SETSS P4OUT|=BIT2
-#define CLRSS P4OUT&=~BIT2
-#define DIRSS P4DIR|=BIT2
+//#define SETSS P4OUT|=BIT2
+//#define CLRSS P4OUT&=~BIT2
+//#define DIRSS P4DIR|=BIT2
 
 //Flash CS is P4.4
-//#define SETSS P4OUT|=BIT4
-//#define CLRSS P4OUT&=~BIT4
-//#define DIRSS P4DIR|=BIT4
+#define SETSS P4OUT|=BIT4
+#define CLRSS P4OUT&=~BIT4
+#define DIRSS P4DIR|=BIT4
 
 
-//CC2420 Chip Reset.  Need to document this.
+//CC2420 Chip Enable
 #define SETCE P4OUT|=BIT6
 #define CLRCE P4OUT&=~BIT6
 #define DIRCE P4DIR|=BIT6
-- 
2.20.1