From 65c39b80a197663ed494ea6887159b0efe7116a1 Mon Sep 17 00:00:00 2001
From: dodge-this <dodge-this@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Date: Fri, 3 Sep 2010 17:00:20 +0000
Subject: [PATCH] chipcon 1111 flash fixes, arm7 jtag fixes and improvements

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@719 12e2690d-a6be-4b82-a7b7-67c4a43b65c8
---
 client/GoodFETARM7.py           | 26 ++++++++++++++++++++++++--
 client/GoodFETCC.py             |  7 +++++--
 firmware/apps/chipcon/chipcon.c |  1 +
 firmware/apps/jtag/jtagarm7.c   |  5 ++++-
 firmware/include/jtagarm7.h     |  1 -
 5 files changed, 34 insertions(+), 6 deletions(-)

diff --git a/client/GoodFETARM7.py b/client/GoodFETARM7.py
index 9eb7d0d..81a8aef 100644
--- a/client/GoodFETARM7.py
+++ b/client/GoodFETARM7.py
@@ -40,7 +40,7 @@ OK    = 0x7F
 IR_SHIFT =                  0x80
 DR_SHIFT =                  0x81
 RESETTAP =                  0x82
-RESETTARGET =               0x86
+RESETTARGET =               0x83
 GET_REGISTER =              0x87
 SET_REGISTER =              0x88
 DEBUG_INSTR =               0x89
@@ -504,6 +504,7 @@ class GoodFETARM(GoodFET):
         WARNING: Addresses must be word-aligned!
         """
         regs = self.ARMget_registers()
+        self.ARMset_registers([0xdeadbeef for x in xrange(14)], 0xe)
         output = []
         count = wordcount
         while (wordcount > 0):
@@ -575,7 +576,28 @@ class GoodFETARM(GoodFET):
                   0x02 : "force dbgrq",
                   0x01 : "force dbgack"
                   }
-                  
+    def ARMgetChipID(self):
+        chipid = self.ARMreadMem(SF_CHIP_ID,1)
+        return chipid[0]
+    def ARMwriteFirmware(self, firmware):
+        self.halt()
+        chipid = self.ARMgetChipID()
+        # FIXME: initialize PLL or EBI
+        self.ARMmassErase(chipid)
+        self.ARMset_regCPSR(PM_svc)   # set supervisor mode
+        # FIXME: download the "flash identifier" program into target RAM
+        self.ARMsetPC(PROGGYBASE)
+        self.release()
+        # get manufacturer crap through DCC (really??  screw this...)
+        self.halt()
+        if (self.ARMget_regCPSR() & PM_svc != PM_svc):
+            raise Exception("No longer in Supervisor mode after firmware upload")
+        # FIXME: download the downloader program into target RAM
+        self.ARMsetPC(PROGGYBASE)
+        self.release()
+        # FIXME: use DCC to upload the new firmware
+    def ARMresettarget(self, delay=10):
+        return self.writecmd(0x13,RESETTARGET,2, [ delay&0xff, (delay>>8)&0xff ] )
     def ARMchain0(self, address, bits=0x819684c054, data=0):
         bulk = chop(address,4)
         bulk.extend(chop(bits,8))
diff --git a/client/GoodFETCC.py b/client/GoodFETCC.py
index 344d9a5..e6016fc 100644
--- a/client/GoodFETCC.py
+++ b/client/GoodFETCC.py
@@ -169,6 +169,7 @@ class GoodFETCC(GoodFET):
     
 
     CCversions={0x0100:"cc1110",
+                0x1100:"cc1111",
                 0x8500:"cc2430",
                 0x8900:"cc2431",
                 0x8100:"cc2510",
@@ -177,6 +178,7 @@ class GoodFETCC(GoodFET):
                 0xB500:"cc2531",
                 0xFF00:"CCmissing"};
     CCpagesizes={0x01: 1024, #"CC1110",
+                 0x11: 1024, #"CC1111",
                  0x85: 2048, #"CC2430",
                  0x89: 2048, #"CC2431",
                  0x81: 1024, #"CC2510",
@@ -189,7 +191,8 @@ class GoodFETCC(GoodFET):
     def CCidentstr(self):
         ident=self.CCident();
         chip=self.CCversions.get(ident&0xFF00);
-        return "%s/r%02x" % (chip, ident&0xFF); 
+        pagesize=self.CCpagesizes.get(ident>0xFF);
+        return "%s/r%0.4x/ps0x%0.4x" % (chip, ident,pagesize); 
     def CCident(self):
         """Get a chipcon's ID."""
         self.writecmd(self.APP,0x8B,0,None);
@@ -203,7 +206,7 @@ class GoodFETCC(GoodFET):
         size=self.CCpagesizes.get(chip);
         if(size<10):
             print "ERROR: Pagesize undefined.";
-            print "chip=%02x" %chip;
+            print "chip=%0.4x" %chip;
             sys.exit(1);
             #return 2048;
         return size;
diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c
index 4b0e0df..d2f70ac 100644
--- a/firmware/apps/chipcon/chipcon.c
+++ b/firmware/apps/chipcon/chipcon.c
@@ -344,6 +344,7 @@ unsigned short cc_get_chip_id(){
   //Find the flash word size.
   switch(cmddata[0]){
   case 0x01://CC1110
+  case 0x11://CC1111
   case 0x81://CC2510
   case 0x91://CC2511
     //debugstr("2 bytes/flash word");
diff --git a/firmware/apps/jtag/jtagarm7.c b/firmware/apps/jtag/jtagarm7.c
index c0dda8d..f674510 100644
--- a/firmware/apps/jtag/jtagarm7.c
+++ b/firmware/apps/jtag/jtagarm7.c
@@ -284,9 +284,12 @@ void jtagarm7tdmihandle(unsigned char app, unsigned char verb, unsigned long len
     txdata(app,verb,4);
     break;
   case JTAG_RESETTARGET:
+    //FIXME: BORKEN
+    debugstr("RESET TARGET");
     CLRTST;
-    delay(10);
+    delay(cmddataword[0]);
     SETTST;
+    txdata(app,verb,4);
     break;
 
 
diff --git a/firmware/include/jtagarm7.h b/firmware/include/jtagarm7.h
index 921deea..38555b8 100644
--- a/firmware/include/jtagarm7.h
+++ b/firmware/include/jtagarm7.h
@@ -86,7 +86,6 @@ The least significant bit of the instruction register is scanned in and scanned
 
 
 //JTAGARM7TDMI commands
-#define JTAGARM7_RESETTARGET                0x86
 #define JTAGARM7_GET_REGISTER               0x87
 #define JTAGARM7_SET_REGISTER               0x88
 #define JTAGARM7_DEBUG_INSTR                0x89
-- 
2.20.1