From 7487b2cd89324081ccfc195d49f4158f10ec534f Mon Sep 17 00:00:00 2001 From: travisutk Date: Sat, 20 Jun 2009 19:43:27 +0000 Subject: [PATCH] Fixed bugs in flash programming. Moved pulses into jtag430asm.S for an implementation without C compiler headaches. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@46 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- firmware/Makefile | 2 +- firmware/apps/jtag/jtag.c | 8 +++--- firmware/apps/jtag/jtag430.c | 45 +++++++++++++++++---------------- firmware/apps/jtag/jtag430asm.S | 14 ++++++++++ 4 files changed, 42 insertions(+), 27 deletions(-) create mode 100644 firmware/apps/jtag/jtag430asm.S diff --git a/firmware/Makefile b/firmware/Makefile index 8e7d7ff..b3be6d4 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -11,7 +11,7 @@ GCCINC=-T ldscripts/161x.x CC=msp430-gcc -g -mmcu=$(mcu) -DGCC $(GCCINC) -I include apps= apps/monitor/monitor.o apps/spi/spi.o apps/i2c/i2c.o apps/chipcon/chipcon.o apps/jtag/jtag.o apps/jtag/jtag430.o -libs= lib/msp430f1612.o lib/command.o +libs= lib/msp430f1612.o lib/command.o apps/jtag/jtag430asm.o app=goodfet all: $(app).hex diff --git a/firmware/apps/jtag/jtag.c b/firmware/apps/jtag/jtag.c index cffec3d..bafd01e 100644 --- a/firmware/apps/jtag/jtag.c +++ b/firmware/apps/jtag/jtag.c @@ -27,9 +27,9 @@ unsigned char jtagtrans8(unsigned char byte){ for (bit = 0; bit < 8; bit++) { /* write MOSI on trailing edge of previous clock */ if (byte & 0x80) - SETMOSI; + {SETMOSI;} else - CLRMOSI; + {CLRMOSI;} byte <<= 1; if(bit==7) @@ -61,9 +61,9 @@ unsigned int jtagtrans16(unsigned int word){ for (bit = 0; bit < 16; bit++) { /* write MOSI on trailing edge of previous clock */ if (word & 0x8000) - SETMOSI; + {SETMOSI;} else - CLRMOSI; + {CLRMOSI;} word <<= 1; if(bit==15) diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c index cc2ecc2..081fb52 100644 --- a/firmware/apps/jtag/jtag430.c +++ b/firmware/apps/jtag/jtag430.c @@ -79,30 +79,30 @@ void jtag430_writemem(unsigned int adr, unsigned int data){ SETTCLK; } -//! Pulse TCLK at 350kHz +/- 100kHz -void jtag430_tclk_flashpulses(unsigned int i){ - //TODO check this on a scope. +//! Defined in jtag430asm.S +void jtag430_tclk_flashpulses(int); +/* //! Pulse TCLK at 350kHz +/- 100kHz */ +/* void jtag430_tclk_flashpulses(register i){ */ +/* //TODO check this on a scope. */ +/* register j=0; */ - //At 2MHz, 350kHz is obtained with 5 clocks of delay +/* //At 2MHz, 350kHz is obtained with 5 clocks of delay */ - /** Pondering: - What happens if the frequency is too low or to high? - Is there any risk of damaging the chip, or only of a poor write? - */ - while(i--){ - SETTCLK; - _NOP(); - _NOP(); - _NOP(); - _NOP(); - _NOP(); - CLRTCLK; - } -} +/* /\** Pondering: */ +/* What happens if the frequency is too low or to high? */ +/* Is there any risk of damaging the chip, or only of a poor write? */ +/* *\/ */ +/* while(j++!=i){ */ +/* SETTCLK; */ +/* _NOP(); */ +/* _NOP(); */ +/* _NOP(); */ +/* CLRTCLK; */ +/* } */ +/* } */ //! Write data to flash memory. Must be preconfigured. void jtag430_writeflashword(unsigned int adr, unsigned int data){ - //jtag430_haltcpu(); /* CLRTCLK; jtag_ir_shift8(IR_CNTRL_SIG_16BIT); @@ -124,10 +124,9 @@ void jtag430_writeflashword(unsigned int adr, unsigned int data){ jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x2409); - //Pulse TCLK - jtag430_tclk_flashpulses(35); - //jtag430_releasecpu(); + jtag430_tclk_flashpulses(35); //35 standard + } //! Configure flash, then write a word. @@ -297,6 +296,8 @@ void jtag430handle(unsigned char app, txdata(app,verb,2); break; case JTAG430_ERASEFLASH: + jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF); + jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF); jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF); txdata(app,verb,0); break; diff --git a/firmware/apps/jtag/jtag430asm.S b/firmware/apps/jtag/jtag430asm.S new file mode 100644 index 0000000..2477016 --- /dev/null +++ b/firmware/apps/jtag/jtag430asm.S @@ -0,0 +1,14 @@ +.globl jtag430_tclk_flashpulses +.type jtag430_tclk_flashpulses,@function /* declare main as a function */ + +jtag430_tclk_flashpulses: + sub #1, r15 + bis.b #2, &0x0031 ;SETTCLK + nop + nop + nop + bic.b #2, &0x0031 ;CLRTCLK + tst r15 + jnz jtag430_tclk_flashpulses + ret + -- 2.20.1