From 7f43ff80b47ffc85c8078d962011024979ee6e20 Mon Sep 17 00:00:00 2001 From: travisutk Date: Fri, 28 Aug 2009 19:07:36 +0000 Subject: [PATCH] msp430_init_dco on 2xx devices now knows defaults for MSP430F2618 chips with missing Info flash. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@91 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- firmware/lib/msp430x2618.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/firmware/lib/msp430x2618.c b/firmware/lib/msp430x2618.c index 0158082..b25225d 100644 --- a/firmware/lib/msp430x2618.c +++ b/firmware/lib/msp430x2618.c @@ -127,12 +127,29 @@ void msp430_init_uart(){ } +//! Initialize the MSP430 clock. void msp430_init_dco() { - //This REQUIRES that info flash be unmolested. - //TODO check for that. + //LED lights when init_dco begins, + //then dims when successful. + PLEDOUT|=PLEDPIN; - BCSCTL1 = CALBC1_16MHZ; - DCOCTL = CALDCO_16MHZ; + if(CALBC1_16MHZ!=0xFF && CALDCO_16MHZ!=0xFF){ + //Info is intact, use it. + BCSCTL1 = CALBC1_16MHZ; + DCOCTL = CALDCO_16MHZ; + }else{ + //Info is missing, guess at a good value. + switch(*((int*)0xff0)){ + default: + case 0x6ff2: //f26f, the MSP430F2618 + BCSCTL1 = 0x8f; //CALBC1_16MHZ at 0x10f9 + DCOCTL = 0x7f; //CALDCO_16MHZ at 0x10f8 + break; + } + } + + //Hopefully by here the clock is meaningful. + PLEDOUT&=~PLEDPIN; return; } -- 2.20.1