From b1ae86eaae79309b8993c505d85b915dcac546b9 Mon Sep 17 00:00:00 2001
From: travisutk <travisutk@12e2690d-a6be-4b82-a7b7-67c4a43b65c8>
Date: Sun, 16 May 2010 00:47:52 +0000
Subject: [PATCH] Adds upport for some 20-bit MSP430X chips. MSP430X2 will come
 later, and this might break MSP430F1xx family.

git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@507 12e2690d-a6be-4b82-a7b7-67c4a43b65c8
---
 firmware/apps/jtag/jtag.c      | 22 +++++++++++++++++++++-
 firmware/apps/jtag/jtag430.c   |  6 +++---
 firmware/apps/jtag/jtag430x2.c | 10 +++++++++-
 firmware/include/jtag.h        |  2 ++
 4 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/firmware/apps/jtag/jtag.c b/firmware/apps/jtag/jtag.c
index 97db51b..d9193e8 100644
--- a/firmware/apps/jtag/jtag.c
+++ b/firmware/apps/jtag/jtag.c
@@ -103,7 +103,7 @@ void jtag_stop(){
   P4OUT=0;
 }
 
-unsigned int drwidth=20;
+unsigned int drwidth=16;
 //! Shift all bits of the DR.
 unsigned long jtag_dr_shift20(unsigned long in){
   // idle
@@ -135,6 +135,26 @@ unsigned int jtag_dr_shift16(unsigned int in){
   return(jtagtransn(in,16));
 }
 
+//! Shift native width of the DR
+unsigned long jtag_dr_shiftadr(unsigned long in){
+  unsigned long out=0;
+  
+  // idle
+  SETTMS;
+  TCKTOCK;
+  // select DR
+  CLRTMS;
+  TCKTOCK;
+  // capture IR
+  TCKTOCK;
+
+  
+  out=jtagtransn(in,drwidth);
+  
+  // shift DR, then idle
+  return(out);
+}
+
 
 //! Shift 8 bits of the IR.
 unsigned char jtag_ir_shift8(unsigned char in){
diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c
index 7aea264..20055f2 100644
--- a/firmware/apps/jtag/jtag430.c
+++ b/firmware/apps/jtag/jtag430.c
@@ -70,7 +70,7 @@ unsigned int jtag430_readmem(unsigned int adr){
   else
     jtag_dr_shift16(0x2419);//byte read
   jtag_ir_shift8(IR_ADDR_16BIT);
-  jtag_dr_shift16(adr);//address
+  jtag_dr_shiftadr(adr);//address
   jtag_ir_shift8(IR_DATA_TO_ADDR);
   SETTCLK;
 
@@ -89,7 +89,7 @@ void jtag430_writemem(unsigned int adr, unsigned int data){
   else
     jtag_dr_shift16(0x2418);//byte write
   jtag_ir_shift8(IR_ADDR_16BIT);
-  jtag_dr_shift16(adr);
+  jtag_dr_shiftadr(adr);
   jtag_ir_shift8(IR_DATA_TO_ADDR);
   jtag_dr_shift16(data);
   SETTCLK;
@@ -102,7 +102,7 @@ void jtag430_writeflashword(unsigned int adr, unsigned int data){
   jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
   jtag_dr_shift16(0x2408);//word write
   jtag_ir_shift8(IR_ADDR_16BIT);
-  jtag_dr_shift16(adr);
+  jtag_dr_shiftadr(adr);
   jtag_ir_shift8(IR_DATA_TO_ADDR);
   jtag_dr_shift16(data);
   SETTCLK;
diff --git a/firmware/apps/jtag/jtag430x2.c b/firmware/apps/jtag/jtag430x2.c
index d2bb194..f499de2 100644
--- a/firmware/apps/jtag/jtag430x2.c
+++ b/firmware/apps/jtag/jtag430x2.c
@@ -209,7 +209,15 @@ void jtag430x2handle(unsigned char app,
     //MSP430 or MSP430X
     if(jtagid==MSP430JTAGID){ 
       jtag430mode=MSP430MODE;
-      drwidth=16;
+      
+      /* So the way this works is that a width of 20 does some
+	 backward-compatibility finagling, causing the correct value
+	 to be exchanged for addresses on 16-bit chips as well as the
+	 new MSP430X chips.  (This has only been verified on the
+	 MSP430F2xx family.  TODO verify for others.)
+       */
+
+      drwidth=20;
       
       //Perform a reset and disable watchdog.
       jtag430_por();
diff --git a/firmware/include/jtag.h b/firmware/include/jtag.h
index 59a0e51..8cb0fdb 100644
--- a/firmware/include/jtag.h
+++ b/firmware/include/jtag.h
@@ -20,6 +20,8 @@ extern unsigned int jtag430mode;
 //! Shift n bytes.
 unsigned long jtagtransn(unsigned long word,
 			 unsigned int bitcount);
+//! Shift the address width.
+unsigned long jtag_dr_shiftadr(unsigned long in);
 //! Shift 8 bits of the IR.
 unsigned char jtag_ir_shift8(unsigned char);
 //! Shift 16 bits of the DR.
-- 
2.20.1