From c3c1c0c873f693e6d57e8e2acf11d52aa6540ff3 Mon Sep 17 00:00:00 2001 From: dodge-this Date: Fri, 8 Oct 2010 12:48:38 +0000 Subject: [PATCH] setting up for adiv5, the latest arm debug protocols git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@749 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- firmware/apps/jtag/jtagarm7.c | 70 ++++++++++++++++++++++------------- firmware/include/apps.h | 3 +- firmware/include/jtag.h | 18 ++++++++- firmware/include/jtagarm7.h | 6 ++- 4 files changed, 68 insertions(+), 29 deletions(-) diff --git a/firmware/apps/jtag/jtagarm7.c b/firmware/apps/jtag/jtagarm7.c index cd9bf63..7e103fc 100644 --- a/firmware/apps/jtag/jtagarm7.c +++ b/firmware/apps/jtag/jtagarm7.c @@ -35,7 +35,7 @@ http://hri.sourceforge.net/tools/jtag_faq_org.html /* WHAT SHOULD THIS MODULE DO? * *start - * *shift_ir + * *jtagarm_shift_ir * *shift_dr * reset_tap * *scanchain0 @@ -55,10 +55,14 @@ void jtagarm7tdmi_start() { } -u8 shift_ir(u8 ir, u8 flags){ - u8 retval; - jtag_goto_shift_ir(); - retval = jtagtransn(ir, 4, LSB|flags); +u8 jtagarm_shift_ir(u8 ir, u8 flags){ + u8 retval = 0; + if (last_ir != ir){ + jtag_goto_shift_ir(); + retval = jtagtransn(ir, 4, LSB|flags); + tapstate = RunTest_Idle; + last_ir = ir; + } return retval; } @@ -70,11 +74,15 @@ wise, when in debug state, the core will not be correctly isolated and intrusive commands occur. Therefore, it is recommended to pass directly from the “Update” state” to the “Select DR” state each time the “Update” state is reached. */ - unsigned long retval; - shift_ir(ARM7TDMI_IR_SCAN_N, NORETIDLE); - jtag_goto_shift_dr(); - retval = jtagtransn(chain, 4, LSB | NORETIDLE); - shift_ir(testmode, NORETIDLE); + unsigned long retval = 0; + if (last_scanchain != chain){ + jtagarm_shift_ir(ARM7TDMI_IR_SCAN_N, NORETIDLE); + last_scanchain = chain; + jtag_goto_shift_dr(); + retval = jtagtransn(chain, 4, LSB | NORETIDLE); + tapstate = Update_DR; + } + jtagarm_shift_ir(testmode, NORETIDLE); return(retval); } @@ -88,6 +96,7 @@ unsigned long eice_write(unsigned char reg, unsigned long data){ retval = jtagtransn(data, 32, LSB| NOEND| NORETIDLE); // send in the data - 32-bits lsb temp = jtagtransn(reg, 5, LSB| NOEND| NORETIDLE); // send in the register address - 5 bits lsb jtagtransn(1, 1, LSB); // send in the WRITE bit + tapstate = RunTest_Idle; return(retval); } @@ -100,30 +109,37 @@ unsigned long eice_read(unsigned char reg){ // PROVEN jtagtransn(0L, 1, LSB); // clear TDI to select "read only" jtag_goto_shift_dr(); // Now shift out the 32 bits retval = jtagtransn(0L, 32, LSB); // atmel arm jtag docs pp.10-11: LSB first + tapstate = RunTest_Idle; return(retval); } //! push an instruction into the pipeline unsigned long jtagarm7tdmi_instr_primitive(unsigned long instr, char breakpt){ // PROVEN - unsigned long retval; + unsigned long retval = 0; jtagarm7tdmi_scan(1, ARM7TDMI_IR_INTEST); //debughex32(instr); - jtag_goto_shift_dr(); - // if the next instruction is to run using MCLK (master clock), set TDI - if (breakpt) - { - SETMOSI; - } - else - { - CLRMOSI; - } - jtag_tcktock(); - - // Now shift in the 32 bits - retval = jtagtransn(instr, 32, 0); // Must return to RUN-TEST/IDLE state for instruction to enter pipeline, and causes debug clock. + if (last_instr != instr && last_sysstate != breakpt){ + jtag_goto_shift_dr(); + // if the next instruction is to run using MCLK (master clock), set TDI + if (breakpt) + { + SETMOSI; + } + else + { + CLRMOSI; + } + jtag_tcktock(); + + // Now shift in the 32 bits + retval = jtagtransn(instr, 32, 0); // Must return to RUN-TEST/IDLE state for instruction to enter pipeline, and causes debug clock. + tapstate = RunTest_Idle; + last_instr = instr; + last_sysstate = breakpt; + } else + jtag_tcktock(); return(retval); } @@ -240,12 +256,13 @@ void jtagarm7tdmihandle(unsigned char app, unsigned char verb, unsigned long len txdata(app,verb,0); break; case JTAG_IR_SHIFT: - cmddataword[0] = shift_ir(cmddata[0], cmddata[1]); + cmddataword[0] = jtagarm_shift_ir(cmddata[0], cmddata[1]); txdata(app,verb,1); break; case JTAG_DR_SHIFT: jtag_goto_shift_dr(); cmddatalong[0] = jtagtransn(cmddatalong[1],cmddata[0],cmddata[1]); + tapstate = (cmddata[1]&NORETIDLE)>0?Update_DR:RunTest_Idle; txdata(app,verb,4); break; case JTAGARM7_CHAIN0: @@ -259,6 +276,7 @@ void jtagarm7tdmihandle(unsigned char app, unsigned char verb, unsigned long len cmddatalong[2] = jtagtransn(cmddataword[4], 9, MSB| NOEND| NORETIDLE); cmddatalong[1] = jtagtransn(cmddatalong[1], 32, MSB| NOEND| NORETIDLE); cmddatalong[3] = jtagtransn(cmddatalong[3], 32, MSB); + tapstate = RunTest_Idle; txdata(app,verb,16); break; case JTAGARM7_SCANCHAIN1: diff --git a/firmware/include/apps.h b/firmware/include/apps.h index 82e6d1b..19c5eea 100644 --- a/firmware/include/apps.h +++ b/firmware/include/apps.h @@ -12,7 +12,8 @@ #define JTAG 0x10 #define JTAG430 0x11 #define EJTAG 0x12 -#define JTAGARM7TDMI 0x13 //Uncomment this as soon as client patched. +#define JTAGARM7TDMI 0x13 +#define ADIv5 0x14 //Manufacturer-specific protocols go in 0x30 and 0x40. #define CHIPCON 0x30 diff --git a/firmware/include/jtag.h b/firmware/include/jtag.h index 4795109..2d09c2c 100644 --- a/firmware/include/jtag.h +++ b/firmware/include/jtag.h @@ -104,5 +104,21 @@ extern int savedtclk; //JTAG430 commands //#include "jtag430.h" - +#define Exit2_DR 0x0 +#define Exit_DR 0x1 +#define Shift_DR 0x2 +#define Pause_DR 0x3 +#define Select_IR 0x4 +#define Update_DR 0x5 +#define Capture_DR 0x6 +#define Select_DR 0x7 +#define Exit2_IR 0x8 +#define Exit_IR 0x9 +#define Shift_IR 0xa +#define Pause_IR 0xb +#define RunTest_Idle 0xc +#define Update_IR 0xd +#define Capture_IR 0xe +#define Test_Reset 0xf + #endif diff --git a/firmware/include/jtagarm7.h b/firmware/include/jtagarm7.h index 38555b8..3c59555 100644 --- a/firmware/include/jtagarm7.h +++ b/firmware/include/jtagarm7.h @@ -8,7 +8,11 @@ #define JTAGSTATE_ARM 0 // bit 4 on dbg status reg is low #define JTAGSTATE_THUMB 1 -unsigned char current_chain; +unsigned long last_instr = -1; +unsigned char last_sysstate = 0; +unsigned char last_ir = -1; +unsigned char last_scanchain = -1; +unsigned char tapstate = 15; unsigned char current_dbgstate = -1; //unsigned char last_halt_debug_state = -1; //unsigned long last_halt_pc = -1; -- 2.20.1