From dc4bd8e19d524bc2f057f78f6a0654b28ab216f9 Mon Sep 17 00:00:00 2001 From: travisutk Date: Sun, 29 Apr 2012 17:33:42 +0000 Subject: [PATCH] Chipcon 8051 target works again. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@1149 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- firmware/apps/chipcon/chipcon.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c index 5785e2e..6a12362 100644 --- a/firmware/apps/chipcon/chipcon.c +++ b/firmware/apps/chipcon/chipcon.c @@ -61,10 +61,13 @@ app_t const chipcon_app = { #define RST BIT6 // P3.7 #include -#else // tilaunchpad -#define RST BIT0 + + +//Normal pins. +#else +#define RST BIT0 // P5.0 #define dputs(s) -#endif // ! tilaunchad +#endif #define MOSI BIT2 #define MISO BIT2 @@ -75,7 +78,7 @@ app_t const chipcon_app = { //Does it ever need to be? #define CCSPEED 3 //#define CCSPEED 3 -//#define CCDELAY(x) delay(x) +//#define CCDELAY(x) delay_ms(x) #define CCDELAY(x) #define SETMOSI SPIOUT|=MOSI @@ -94,8 +97,8 @@ app_t const chipcon_app = { # define SETRST P3OUT|=RST # define CLRRST P3OUT&=~RST #else -# define SETRST P3OUT|=RST -# define CLRRST P3OUT&=~RST +# define SETRST P5OUT|=RST +# define CLRRST P5OUT&=~RST #endif #define CCWRITE SPIDIR|=MOSI @@ -176,6 +179,7 @@ unsigned char cctrans8(unsigned char byte){ //Minor alterations. for (bit = 0; bit < 8; bit++) { + CCDELAY(CCSPEED>>2); /* write MOSI on trailing edge of previous clock */ if (byte & 0x80) SETMOSI; -- 2.20.1