From ec842a71bc86390267ca8dffdd5cf8236dc211e4 Mon Sep 17 00:00:00 2001 From: dodge-this Date: Thu, 12 Aug 2010 16:09:59 +0000 Subject: [PATCH] w00t! jtagarm7 committed and included in build. i need the one with the big gb's! git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@691 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- firmware/Makefile | 2 +- firmware/apps/jtag/jtag.c | 6 ++- firmware/apps/jtag/jtagarm7tdmi.c | 72 ------------------------------- firmware/include/jtag.h | 3 +- firmware/include/jtagarm7tdmi.h | 48 +++++---------------- 5 files changed, 19 insertions(+), 112 deletions(-) diff --git a/firmware/Makefile b/firmware/Makefile index f96968f..eecfcef 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -30,7 +30,7 @@ CC=msp430-gcc -Wall -Os -g -mmcu=$(mcu) -D$(mcu) -D$(platform) -Dplatform=$(plat #Define extra modules here. #moreapps?=apps/i2c/i2c.o apps/glitch/glitch.o apps/jtag/sbw.o apps/smartcard/smartcard.o apps/jtag/ejtag.o apps/jtag/jtagxscale.o -moreapps?=apps/jtag/sbw.o apps/glitch/glitch.o +moreapps?=apps/jtag/sbw.o apps/glitch/glitch.o apps/jtag/jtagarm7.o # should include apps/jtag/jtagarm7tdmi.o to build jtag for ARM7 # should include apps/pic/dspic33f.o to build support for PIC24H/dsPIC33F diff --git a/firmware/apps/jtag/jtag.c b/firmware/apps/jtag/jtag.c index 906dd14..cc6ef16 100644 --- a/firmware/apps/jtag/jtag.c +++ b/firmware/apps/jtag/jtag.c @@ -48,7 +48,7 @@ void jtag_goto_shift_dr() { jtag_tcktock(); } -void jtag_reset_to_runtest_idle() { +void jtag_resettap(){ SETTMS; jtag_tcktock(); jtag_tcktock(); @@ -313,6 +313,10 @@ void jtaghandle(unsigned char app, cmddataword[0]=jtag_dr_shift16(cmddataword[0]); txdata(app,verb,2); break; + case JTAG_RESETTAP: + jtag_resettap(); + txdata(app,verb,0); + break; default: txdata(app,NOK,0); } diff --git a/firmware/apps/jtag/jtagarm7tdmi.c b/firmware/apps/jtag/jtagarm7tdmi.c index d4f777d..3eb3311 100644 --- a/firmware/apps/jtag/jtagarm7tdmi.c +++ b/firmware/apps/jtag/jtagarm7tdmi.c @@ -109,78 +109,6 @@ void jtagarm7tdmi_resettap(){ // PROVEN } -// NOTE: important: THIS MODULE REVOLVES AROUND RETURNING TO RUNTEST/IDLE, OR THE FUNCTIONAL EQUIVALENT - -/* -//! Shift N bits over TDI/TDO. May choose LSB or MSB, and select whether to terminate (TMS-high on last bit) and whether to return to RUNTEST/IDLE -unsigned long jtagarmtransn(unsigned long word, unsigned char bitcount, unsigned char lsb, unsigned char end, unsigned char retidle){ // PROVEN - unsigned char bit; - unsigned long high = 1L; - unsigned long mask; - - //for (bit=(bitcount-1)/8; bit>0; bit--) - // high <<= 8; - //high <<= ((bitcount-1)%8); - high <<= (bitcount-1); - - mask = high-1; - - SAVETCLK; - if (lsb) { - for (bit = bitcount; bit > 0; bit--) { - // write MOSI on trailing edge of previous clock * - if (word & 1) - {SETMOSI;} - else - {CLRMOSI;} - word >>= 1; - - if (bit==1 && end) - SETTMS;//TMS high on last bit to exit. - - jtag_arm_tcktock(); - - // read MISO on trailing edge * - if (READMISO){ - word += (high); - } - } - } else { - for (bit = bitcount; bit > 0; bit--) { - // write MOSI on trailing edge of previous clock * - if (word & high) - {SETMOSI;} - else - {CLRMOSI;} - word = (word & mask) << 1; - - if (bit==1 && end) - SETTMS;//TMS high on last bit to exit. - - jtag_arm_tcktock(); - - // read MISO on trailing edge * - word |= (READMISO); - } - } - - - RESTORETCLK; - //SETMOSI; - - if (end){ - // exit state - jtag_arm_tcktock(); - // update state - if (retidle){ - CLRTMS; - jtag_arm_tcktock(); - } - } - return word; -} -*/ - /************************************************************************ * ARM7TDMI core has 6 primary registers to be connected between TDI/TDO diff --git a/firmware/include/jtag.h b/firmware/include/jtag.h index 352e044..b4c4155 100644 --- a/firmware/include/jtag.h +++ b/firmware/include/jtag.h @@ -38,7 +38,7 @@ void jtag_goto_shift_ir(); //! Go to SHIFT_DR void jtag_goto_shift_dr(); //! TAP RESET -void jtag_reset_to_runtest_idle(); +void jtag_resettap(); //Pins. Both SPI and JTAG names are acceptable. //#define SS BIT0 @@ -92,6 +92,7 @@ extern int savedtclk; //JTAG commands #define JTAG_IR_SHIFT 0x80 #define JTAG_DR_SHIFT 0x81 +#define JTAG_RESETTAP 0x82 #define JTAG_DR_SHIFT20 0x91 #define MSB 0 diff --git a/firmware/include/jtagarm7tdmi.h b/firmware/include/jtagarm7tdmi.h index 37960fe..fe2bc41 100644 --- a/firmware/include/jtagarm7tdmi.h +++ b/firmware/include/jtagarm7tdmi.h @@ -49,7 +49,7 @@ unsigned long jtagarm7tdmi_writeflash(unsigned long adr, unsigned long data); //! Start JTAG -unsigned long jtagarm7tdmi_start(void); +void jtagarm7tdmi_start(void); //! Reset TAP State Machine void jtagarm7tdmi_resettap(); @@ -131,43 +131,17 @@ The least significant bit of the instruction register is scanned in and scanned //JTAGARM7TDMI commands -#define JTAGARM7TDMI_GET_DEBUG_CTRL 0x80 -#define JTAGARM7TDMI_SET_DEBUG_CTRL 0x81 -#define JTAGARM7TDMI_GET_PC 0x82 -#define JTAGARM7TDMI_SET_PC 0x83 -#define JTAGARM7TDMI_GET_CHIP_ID 0x84 -#define JTAGARM7TDMI_GET_DEBUG_STATE 0x85 -#define JTAGARM7TDMI_GET_WATCHPOINT 0x86 -#define JTAGARM7TDMI_SET_WATCHPOINT 0x87 -#define JTAGARM7TDMI_GET_REGISTER 0x88 -#define JTAGARM7TDMI_SET_REGISTER 0x89 -#define JTAGARM7TDMI_GET_REGISTERS 0x8a -#define JTAGARM7TDMI_SET_REGISTERS 0x8b -#define JTAGARM7TDMI_HALTCPU 0x8c -#define JTAGARM7TDMI_RELEASECPU 0x8d -#define JTAGARM7TDMI_DEBUG_INSTR 0x8e -#define JTAGARM7TDMI_STEP_INSTR 0x8f -#define JTAGARM7TDMI_WRITEMEM 0x90 -#define JTAGARM7TDMI_READMEM 0x91 -#define JTAGARM7TDMI_WRITE_FLASH_PAGE 0x92 -#define JTAGARM7TDMI_READ_FLASH_PAGE 0x93 -#define JTAGARM7TDMI_MASS_ERASE_FLASH 0x94 -#define JTAGARM7TDMI_PROGRAM_FLASH 0x95 -#define JTAGARM7TDMI_LOCKCHIP 0x96 -#define JTAGARM7TDMI_CHIP_ERASE 0x97 +#define JTAGARM7_GET_REGISTER 0x87 +#define JTAGARM7_SET_REGISTER 0x88 +#define JTAGARM7_DEBUG_INSTR 0x89 // Really ARM specific stuff -#define JTAGARM7TDMI_GET_CPSR 0x98 -#define JTAGARM7TDMI_SET_CPSR 0x99 -#define JTAGARM7TDMI_GET_SPSR 0x9a -#define JTAGARM7TDMI_SET_SPSR 0x9b -#define JTAGARM7TDMI_SET_MODE_THUMB 0x9c -#define JTAGARM7TDMI_SET_MODE_ARM 0x9d -#define JTAGARM7TDMI_SET_IR 0x9e -#define JTAGARM7TDMI_WAIT_DBG 0x9f -#define JTAGARM7TDMI_SHIFT_DR 0xa0 -#define JTAGARM7TDMI_SETWATCH0 0xa1 -#define JTAGARM7TDMI_SETWATCH1 0xa2 -#define JTAGARM7TDMI_CHAIN0 0xa3 +#define JTAGARM7_SET_IR 0x90 +#define JTAGARM7_WAIT_DBG 0x91 +#define JTAGARM7_SHIFT_DR 0x92 +#define JTAGARM7_CHAIN0 0x93 +#define JTAGARM7_SCANCHAIN1 0x94 +#define JTAGARM7_EICE_READ 0x95 +#define JTAGARM7_EICE_WRITE 0x96 // for deeper understanding, read the instruction cycle timing section of: -- 2.20.1