2 * linux/arch/alpha/kernel/core_polaris.c
4 * POLARIS chip-specific code
7 #include <linux/kernel.h>
8 #include <linux/types.h>
10 #include <linux/sched.h>
11 #include <linux/init.h>
13 #include <asm/system.h>
14 #include <asm/ptrace.h>
16 #define __EXTERN_INLINE inline
18 #include <asm/core_polaris.h>
19 #undef __EXTERN_INLINE
25 * BIOS32-style PCI interface:
28 #define DEBUG_CONFIG 0
31 # define DBG_CFG(args) printk args
33 # define DBG_CFG(args)
38 * Given a bus, device, and function number, compute resulting
39 * configuration space address. This is fairly straightforward
40 * on POLARIS, since the chip itself generates Type 0 or Type 1
41 * cycles automatically depending on the bus number (Bus 0 is
42 * hardwired to Type 0, all others are Type 1. Peer bridges
47 * 3 3 3 3|3 3 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1
48 * 9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0
49 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
50 * |1|1|1|1|1|0|0|1|1|1|1|1|1|1|1|0|B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|x|x|
51 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
53 * 23:16 bus number (8 bits = 128 possible buses)
54 * 15:11 Device number (5 bits)
55 * 10:8 function number
59 * The function number selects which function of a multi-function device
60 * (e.g., scsi and ethernet).
62 * The register selects a DWORD (32 bit) register offset. Hence it
63 * doesn't get shifted by 2 bits as we want to "drop" the bottom two
68 mk_conf_addr(struct pci_dev *dev, int where, unsigned long *pci_addr, u8 *type1)
70 u8 bus = dev->bus->number;
71 u8 device_fn = dev->devfn;
73 *type1 = (bus == 0) ? 0 : 1;
74 *pci_addr = (bus << 16) | (device_fn << 8) | (where) |
75 POLARIS_DENSE_CONFIG_BASE;
77 DBG_CFG(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x,"
78 " returning address 0x%p\n"
79 bus, device_fn, where, *pci_addr));
85 polaris_read_config_byte(struct pci_dev *dev, int where, u8 *value)
87 unsigned long pci_addr;
90 if (mk_conf_addr(dev, where, &pci_addr, &type1))
91 return PCIBIOS_DEVICE_NOT_FOUND;
93 *value = __kernel_ldbu(*(vucp)pci_addr);
94 return PCIBIOS_SUCCESSFUL;
98 polaris_read_config_word(struct pci_dev *dev, int where, u16 *value)
100 unsigned long pci_addr;
103 if (mk_conf_addr(dev, where, &pci_addr, &type1))
104 return PCIBIOS_DEVICE_NOT_FOUND;
106 *value = __kernel_ldwu(*(vusp)pci_addr);
107 return PCIBIOS_SUCCESSFUL;
111 polaris_read_config_dword(struct pci_dev *dev, int where, u32 *value)
113 unsigned long pci_addr;
116 if (mk_conf_addr(dev, where, &pci_addr, &type1))
117 return PCIBIOS_DEVICE_NOT_FOUND;
119 *value = *(vuip)pci_addr;
120 return PCIBIOS_SUCCESSFUL;
124 polaris_write_config_byte(struct pci_dev *dev, int where, u8 value)
126 unsigned long pci_addr;
129 if (mk_conf_addr(dev, where, &pci_addr, &type1))
130 return PCIBIOS_DEVICE_NOT_FOUND;
132 __kernel_stb(value, *(vucp)pci_addr);
134 __kernel_ldbu(*(vucp)pci_addr);
135 return PCIBIOS_SUCCESSFUL;
139 polaris_write_config_word(struct pci_dev *dev, int where, u16 value)
141 unsigned long pci_addr;
144 if (mk_conf_addr(dev, where, &pci_addr, &type1))
145 return PCIBIOS_DEVICE_NOT_FOUND;
147 __kernel_stw(value, *(vusp)pci_addr);
149 __kernel_ldwu(*(vusp)pci_addr);
150 return PCIBIOS_SUCCESSFUL;
154 polaris_write_config_dword(struct pci_dev *dev, int where, u32 value)
156 unsigned long pci_addr;
159 if (mk_conf_addr(dev, where, &pci_addr, &type1))
160 return PCIBIOS_DEVICE_NOT_FOUND;
162 *(vuip)pci_addr = value;
165 return PCIBIOS_SUCCESSFUL;
168 struct pci_ops polaris_pci_ops =
170 read_byte: polaris_read_config_byte,
171 read_word: polaris_read_config_word,
172 read_dword: polaris_read_config_dword,
173 write_byte: polaris_write_config_byte,
174 write_word: polaris_write_config_word,
175 write_dword: polaris_write_config_dword
179 polaris_init_arch(void)
181 struct pci_controller *hose;
183 /* May need to initialize error reporting (see PCICTL0/1), but
184 * for now assume that the firmware has done the right thing
188 printk("polaris_init_arch(): trusting firmware for setup\n");
192 * Create our single hose.
195 pci_isa_hose = hose = alloc_pci_controller();
196 hose->io_space = &ioport_resource;
197 hose->mem_space = &iomem_resource;
200 hose->sparse_mem_base = 0;
201 hose->dense_mem_base = POLARIS_DENSE_MEM_BASE - IDENT_ADDR;
202 hose->sparse_io_base = 0;
203 hose->dense_io_base = POLARIS_DENSE_IO_BASE - IDENT_ADDR;
205 hose->sg_isa = hose->sg_pci = NULL;
207 /* The I/O window is fixed at 2G @ 2G. */
208 __direct_map_base = 0x80000000;
209 __direct_map_size = 0x80000000;
213 polaris_pci_clr_err(void)
215 *(vusp)POLARIS_W_STATUS;
216 /* Write 1's to settable bits to clear errors */
217 *(vusp)POLARIS_W_STATUS = 0x7800;
219 *(vusp)POLARIS_W_STATUS;
223 polaris_machine_check(unsigned long vector, unsigned long la_ptr,
224 struct pt_regs * regs)
226 /* Clear the error before any reporting. */
230 polaris_pci_clr_err();
234 process_mcheck_info(vector, la_ptr, regs, "POLARIS",