2 * linux/arch/alpha/kernel/sys_nautilus.c
4 * Copyright (C) 1995 David A Rusling
5 * Copyright (C) 1998 Richard Henderson
6 * Copyright (C) 1999 Alpha Processor, Inc.,
7 * (David Daniel, Stig Telfer, Soohoon Lee)
9 * Code supporting NAUTILUS systems.
12 * NAUTILUS has the following I/O features:
14 * a) Driven by AMD 751 aka IRONGATE (northbridge):
18 * b) Driven by ALI M1543C (southbridge)
21 * 1 dual drive capable FDD controller
23 * 1 ECP/EPP/SP parallel port
27 #include <linux/kernel.h>
28 #include <linux/types.h>
30 #include <linux/sched.h>
31 #include <linux/pci.h>
32 #include <linux/init.h>
33 #include <linux/reboot.h>
34 #include <linux/bootmem.h>
36 #include <asm/ptrace.h>
37 #include <asm/system.h>
40 #include <asm/bitops.h>
41 #include <asm/mmu_context.h>
44 #include <asm/pgtable.h>
45 #include <asm/core_irongate.h>
46 #include <asm/hwrpb.h>
52 #include "machvec_impl.h"
56 nautilus_init_irq(void)
58 if (alpha_using_srm) {
59 alpha_mv.device_interrupt = srm_device_interrupt;
63 common_init_isa_dma();
67 nautilus_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
69 /* Preserve the IRQ set up by the console. */
72 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
77 nautilus_kill_arch(int mode)
83 case LINUX_REBOOT_CMD_RESTART:
84 if (! alpha_using_srm) {
86 pcibios_read_config_byte(0, 0x38, 0x43, &t8);
87 pcibios_write_config_byte(0, 0x38, 0x43, t8 | 0x80);
94 case LINUX_REBOOT_CMD_POWER_OFF:
96 off = 0x2000; /* SLP_TYPE = 0, SLP_EN = 1 */
97 pcibios_read_config_dword(0, 0x88, 0x10, &pmuport);
100 off = 0x3400; /* SLP_TYPE = 5, SLP_EN = 1 */
101 pcibios_read_config_dword(0, 0x88, 0xe0, &pmuport);
104 outw(0xffff, pmuport); /* Clear pending events. */
105 outw(off, pmuport + 4);
111 /* Perform analysis of a machine check that arrived from the system (NMI) */
114 naut_sys_machine_check(unsigned long vector, unsigned long la_ptr,
115 struct pt_regs *regs)
117 printk("PC %lx RA %lx\n", regs->pc, regs->r26);
118 irongate_pci_clr_err();
121 /* Machine checks can come from two sources - those on the CPU and those
122 in the system. They are analysed separately but all starts here. */
125 nautilus_machine_check(unsigned long vector, unsigned long la_ptr,
126 struct pt_regs *regs)
130 /* Now for some analysis. Machine checks fall into two classes --
131 those picked up by the system, and those picked up by the CPU.
132 Add to that the two levels of severity - correctable or not. */
134 if (vector == SCB_Q_SYSMCHK
135 && ((IRONGATE0->dramms & 0x300) == 0x300)) {
136 unsigned long nmi_ctl;
145 /* Write again clears error bits. */
146 IRONGATE0->stat_cmd = IRONGATE0->stat_cmd & ~0x100;
150 /* Write again clears error bits. */
151 IRONGATE0->dramms = IRONGATE0->dramms;
161 if (vector == SCB_Q_SYSERR)
162 mchk_class = "Correctable";
163 else if (vector == SCB_Q_SYSMCHK)
164 mchk_class = "Fatal";
166 ev6_machine_check(vector, la_ptr, regs);
170 printk(KERN_CRIT "NAUTILUS Machine check 0x%lx "
171 "[%s System Machine Check (NMI)]\n",
174 naut_sys_machine_check(vector, la_ptr, regs);
176 /* Tell the PALcode to clear the machine check */
183 extern void free_reserved_mem(void *, void *);
184 extern void pbus_size_bridges(struct pci_bus *);
185 extern void pbus_assign_resources(struct pci_bus *);
187 static struct resource irongate_mem = {
188 .name = "Irongate PCI MEM",
189 .flags = IORESOURCE_MEM,
193 nautilus_init_pci(void)
195 struct pci_controller *hose = hose_head;
198 unsigned long bus_align, bus_size, pci_mem;
199 unsigned long memtop = max_low_pfn << PAGE_SHIFT;
201 /* Scan our single hose. */
202 bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);
204 hose->last_busno = bus->subordinate;
206 bus->self = pci_find_slot(0, 0);
207 bus->resource[1] = &irongate_mem;
209 pbus_size_bridges(bus);
212 bus->resource[0]->start = 0;
213 bus->resource[0]->end = 0xffff;
215 /* Set up PCI memory range - limit is hardwired to 0xffffffff,
216 base must be at aligned to 16Mb. */
217 bus_align = bus->resource[1]->start;
218 bus_size = bus->resource[1]->end + 1 - bus_align;
219 if (bus_align < 0x1000000UL)
220 bus_align = 0x1000000UL;
222 pci_mem = (0x100000000UL - bus_size) & -bus_align;
224 bus->resource[1]->start = pci_mem;
225 bus->resource[1]->end = 0xffffffffUL;
226 if (request_resource(&iomem_resource, bus->resource[1]) < 0)
227 printk(KERN_ERR "Failed to request MEM on hose 0\n");
229 if (pci_mem < memtop)
231 if (memtop > alpha_mv.min_mem_address) {
232 free_reserved_mem(__va(alpha_mv.min_mem_address),
234 printk("nautilus_init_pci: %ldk freed\n",
235 (memtop - alpha_mv.min_mem_address) >> 10);
238 if ((IRONGATE0->dev_vendor >> 16) > 0x7006) /* Albacore? */
239 IRONGATE0->pci_mem = pci_mem;
241 pbus_assign_resources(bus);
243 pci_for_each_dev(dev) {
244 pdev_enable_device(dev);
246 pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
253 struct alpha_machine_vector nautilus_mv __initmv = {
254 vector_name: "Nautilus",
259 machine_check: nautilus_machine_check,
260 max_dma_address: ALPHA_NAUTILUS_MAX_DMA_ADDRESS,
261 min_io_address: DEFAULT_IO_BASE,
262 min_mem_address: IRONGATE_DEFAULT_MEM_BASE,
265 device_interrupt: isa_device_interrupt,
267 init_arch: irongate_init_arch,
268 init_irq: nautilus_init_irq,
269 init_rtc: common_init_rtc,
270 init_pci: nautilus_init_pci,
271 kill_arch: nautilus_kill_arch,
272 pci_map_irq: nautilus_map_irq,
273 pci_swizzle: common_swizzle,