2 * linux/arch/arm/mach-epxa10db/irq.c
4 * Copyright (C) 2001 Altera Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/stddef.h>
22 #include <linux/list.h>
23 #include <linux/timer.h>
25 #include <asm/hardware.h>
28 #include <asm/mach/irq.h>
29 #include <asm/arch/platform.h>
30 #include <asm/arch/int_ctrl00.h>
33 static void mask_irq(unsigned int irq)
35 __raw_writel(1 << irq, INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
38 static void unmask_irq(unsigned int irq)
40 __raw_writel(1 << irq, INT_MS(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
43 void __init epxa_init_irq(void)
48 * This bit sets up the interrupt controller using
49 * the 6 PLD interrupts mode (the default) each
50 * irqs is assigned a priority which is the same
51 * as its interrupt number. This scheme is used because
52 * its easy, but you may want to change it depending
53 * on the contents of your PLD
56 __raw_writel(3,INT_MODE(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
57 for (i = 0; i < NR_IRQS; i++){
58 __raw_writel(i+1, INT_PRIORITY_P0(IO_ADDRESS(EXC_INT_CTRL00_BASE)) + (4*i));
62 for (i = 0; i < NR_IRQS; i++) {
64 irq_desc[i].valid = 1;
65 irq_desc[i].probe_ok = 1;
66 irq_desc[i].mask_ack = mask_irq;
67 irq_desc[i].mask = mask_irq;
68 irq_desc[i].unmask = unmask_irq;
71 /* Disable all interrupt */
72 __raw_writel(-1,INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));