1 Memory management for CRIS/MMU
2 ------------------------------
6 Revision 1.1 2000/07/10 16:25:21 bjornw
9 Revision 1.4 2000/01/17 02:31:59 bjornw
10 Added discussion of paging and VM.
12 Revision 1.3 1999/12/03 16:43:23 hp
13 Blurb about that the 3.5G-limitation is not a MMU limitation
15 Revision 1.2 1999/12/03 16:04:21 hp
16 Picky comment about not mapping the first page
18 Revision 1.1 1999/12/03 15:41:30 bjornw
19 First version of CRIS/MMU memory layout specification.
25 ------------------------------
27 See the ETRAX-NG HSDD for reference.
29 We use the page-size of 8 kbytes, as opposed to the i386 page-size of 4 kbytes.
31 The MMU can, apart from the normal mapping of pages, also do a top-level
32 segmentation of the kernel memory space. We use this feature to avoid having
33 to use page-tables to map the physical memory into the kernel's address
34 space. We also use it to keep the user-mode virtual mapping in the same
35 map during kernel-mode, so that the kernel easily can access the corresponding
36 user-mode process' data.
38 As a comparision, the Linux/i386 2.0 puts the kernel and physical RAM at
39 address 0, overlapping with the user-mode virtual space, so that descriptor
40 registers are needed for each memory access to specify which MMU space to
41 map through. That changed in 2.2, putting the kernel/physical RAM at
42 0xc0000000, to co-exist with the user-mode mapping. We will do something
43 quite similar, but with the additional complexity of having to map the
44 internal chip I/O registers and the flash memory area (including SRAM
45 and peripherial chip-selets).
47 The kernel-mode segmentation map:
49 ------------------------ ------------------------
50 FFFFFFFF| | => cached | |
51 | kernel seg_f | flash | |
52 F0000000|______________________| | |
53 EFFFFFFF| | => uncached | |
54 | kernel seg_e | flash | |
55 E0000000|______________________| | DRAM |
56 DFFFFFFF| | paged to any | Un-cached |
57 | kernel seg_d | =======> | |
58 D0000000|______________________| | |
60 | kernel seg_c |==\ | |
61 C0000000|______________________| \ |______________________|
62 BFFFFFFF| | uncached | |
63 | kernel seg_b |=====\=========>| Registers |
64 B0000000|______________________| \c |______________________|
66 | | \c | FLASH/SRAM/Peripheral|
67 | | \h |______________________|
70 | kernel seg_0 - seg_a | \==>| DRAM |
73 | | =======> |______________________|
76 | | |______________________|
78 | | | FLASH/SRAM/Peripheral|
79 00000000|______________________| |______________________|
81 In user-mode it looks the same except that only the space 0-AFFFFFFF is
82 available. Therefore, in this model, the virtual address space per process
83 is limited to 0xb0000000 bytes (minus 8192 bytes, since the first page,
84 0..8191, is never mapped, in order to trap NULL references).
86 It also means that the total physical RAM that can be mapped is 256 MB
87 (kseg_c above). More RAM can be mapped by choosing a different segmentation
88 and shrinking the user-mode memory space.
90 The MMU can map all 4 GB in user mode, but doing that would mean that a
91 few extra instructions would be needed for each access to user mode
94 The kernel needs access to both cached and uncached flash. Uncached is
95 necessary because of the special write/erase sequences. Also, the
96 peripherial chip-selects are decoded from that region.
98 The kernel also needs its own virtual memory space. That is kseg_d. It
99 is used by the vmalloc() kernel function to allocate virtual contiguous
100 chunks of memory not possible using the normal kmalloc physical RAM
103 The setting of the actual MMU control registers to use this layout would
104 be something like this:
106 R_MMU_KSEG = ( ( seg_f, seg ) | // Flash cached
107 ( seg_e, seg ) | // Flash uncached
108 ( seg_d, page ) | // kernel vmalloc area
109 ( seg_c, seg ) | // kernel linear segment
110 ( seg_b, seg ) | // kernel linear segment
123 R_MMU_KBASE_HI = ( ( base_f, 0x0 ) | // flash/sram/periph cached
124 ( base_e, 0x8 ) | // flash/sram/periph uncached
125 ( base_d, 0x0 ) | // don't care
126 ( base_c, 0x4 ) | // physical RAM cached area
127 ( base_b, 0xb ) | // uncached on-chip registers
128 ( base_a, 0x0 ) | // don't care
129 ( base_9, 0x0 ) | // don't care
130 ( base_8, 0x0 ) ); // don't care
132 R_MMU_KBASE_LO = ( ( base_7, 0x0 ) | // don't care
133 ( base_6, 0x0 ) | // don't care
134 ( base_5, 0x0 ) | // don't care
135 ( base_4, 0x0 ) | // don't care
136 ( base_3, 0x0 ) | // don't care
137 ( base_2, 0x0 ) | // don't care
138 ( base_1, 0x0 ) | // don't care
139 ( base_0, 0x0 ) ); // don't care
141 NOTE: while setting up the MMU, we run in a non-mapped mode in the DRAM (0x40
142 segment) and need to setup the seg_4 to a unity mapping, so that we don't get
143 a fault before we have had time to jump into the real kernel segment (0xc0). This
144 is done in head.S temporarily, but fixed by the kernel later in paging_init.
147 Paging - PTE's, PMD's and PGD's
148 -------------------------------
150 [ References: asm/pgtable.h, asm/page.h, asm/mmu.h ]
152 The paging mechanism uses virtual addresses to split a process memory-space into
153 pages, a page being the smallest unit that can be freely remapped in memory. On
154 Linux/CRIS, a page is 8192 bytes (for technical reasons not equal to 4096 as in
155 most other 32-bit architectures). It would be inefficient to let a virtual memory
156 mapping be controlled by a long table of page mappings, so it is broken down into
157 a 2-level structure with a Page Directory containing pointers to Page Tables which
158 each have maps of up to 2048 pages (8192 / sizeof(void *)). Linux can actually
159 handle 3-level structures as well, with a Page Middle Directory in between, but
160 in many cases, this is folded into a two-level structure by excluding the Middle
163 We'll take a look at how an address is translated while we discuss how it's handled
166 The example address is 0xd004000c; in binary this is:
169 11010000 00000100 00000000 00001100
171 |______| |__________||____________|
174 Given the top-level Page Directory, the offset in that directory is calculated
175 using the upper 8 bits:
177 extern inline pgd_t * pgd_offset(struct mm_struct * mm, unsigned long address)
179 return mm->pgd + (address >> PGDIR_SHIFT);
182 PGDIR_SHIFT is the log2 of the amount of memory an entry in the PGD can map; in our
183 case it is 24, corresponding to 16 MB. This means that each entry in the PGD
184 corresponds to 16 MB of virtual memory.
186 The pgd_t from our example will therefore be the 208'th (0xd0) entry in mm->pgd.
188 Since the Middle Directory does not exist, it is a unity mapping:
190 extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
192 return (pmd_t *) dir;
195 The Page Table provides the final lookup by using bits 13 to 23 as index:
197 extern inline pte_t * pte_offset(pmd_t * dir, unsigned long address)
199 return (pte_t *) pmd_page(*dir) + ((address >> PAGE_SHIFT) &
203 PAGE_SHIFT is the log2 of the size of a page; 13 in our case. PTRS_PER_PTE is
204 the number of pointers that fit in a Page Table and is used to mask off the
205 PGD-part of the address.
207 The so-far unused bits 0 to 12 are used to index inside a page linearily.
212 The kernels own page-directory is the swapper_pg_dir, cleared in paging_init,
213 and contains the kernels virtual mappings (the kernel itself is not paged - it
214 is mapped linearily using kseg_c as described above). Architectures without
215 kernel segments like the i386, need to setup swapper_pg_dir directly in head.S
216 to map the kernel itself. swapper_pg_dir is pointed to by init_mm.pgd as the
219 To see what support functions are used to setup a page-table, let's look at the
220 kernel's internal paged memory system, vmalloc/vfree.
222 void * vmalloc(unsigned long size)
224 The vmalloc-system keeps a paged segment in kernel-space at 0xd0000000. What
225 happens first is that a virtual address chunk is allocated to the request using
226 get_vm_area(size). After that, physical RAM pages are allocated and put into
227 the kernel's page-table using alloc_area_pages(addr, size).
229 static int alloc_area_pages(unsigned long address, unsigned long size)
231 First the PGD entry is found using init_mm.pgd. This is passed to
232 alloc_area_pmd (remember the 3->2 folding). It uses pte_alloc_kernel to
233 check if the PGD entry points anywhere - if not, a page table page is
234 allocated and the PGD entry updated. Then the alloc_area_pte function is
235 used just like alloc_area_pmd to check which page table entry is desired,
236 and a physical page is allocated and the table entry updated. All of this
237 is repeated at the top-level until the entire address range specified has