import of upstream 2.4.34.4 from kernel.org
[linux-2.4.git] / arch / ia64 / kernel / entry.h
1 #include <linux/config.h>
2
3 /*
4  * Preserved registers that are shared between code in ivt.S and entry.S.  Be
5  * careful not to step on these!
6  */
7 #define pLvSys          p1      /* set 1 if leave from syscall; otherwise, set 0*/
8 #define pKern           p2      /* will leave_kernel return to kernel-mode? */
9 #define pUser           p3      /* will leave_kernel return to user-mode? */
10 #define pSys            p4      /* are we processing a (synchronous) system call? */
11 #define pNonSys         p5      /* complement of pSys */
12
13 #define PT(f)           (IA64_PT_REGS_##f##_OFFSET)
14 #define SW(f)           (IA64_SWITCH_STACK_##f##_OFFSET)
15
16 #define PT_REGS_SAVES(off)                      \
17         .unwabi 3, 'i';                         \
18         .fframe IA64_PT_REGS_SIZE+16+(off);     \
19         .spillsp rp, PT(CR_IIP)+16+(off);       \
20         .spillsp ar.pfs, PT(CR_IFS)+16+(off);   \
21         .spillsp ar.unat, PT(AR_UNAT)+16+(off); \
22         .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \
23         .spillsp pr, PT(PR)+16+(off);
24
25 #define PT_REGS_UNWIND_INFO(off)                \
26         .prologue;                              \
27         PT_REGS_SAVES(off);                     \
28         .body
29
30 #define SWITCH_STACK_SAVES(off)                                                 \
31         .savesp ar.unat,SW(CALLER_UNAT)+16+(off);                               \
32         .savesp ar.fpsr,SW(AR_FPSR)+16+(off);                                   \
33         .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off);               \
34         .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off);               \
35         .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off);           \
36         .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off);           \
37         .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off);           \
38         .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off);           \
39         .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off);           \
40         .spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off);           \
41         .spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off);           \
42         .spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off);           \
43         .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off);               \
44         .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off);               \
45         .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off);               \
46         .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off);               \
47         .spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off);               \
48         .spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off); \
49         .spillsp @priunat,SW(AR_UNAT)+16+(off);                                 \
50         .spillsp ar.rnat,SW(AR_RNAT)+16+(off);                                  \
51         .spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off);                          \
52         .spillsp pr,SW(PR)+16+(off))
53
54 #define DO_SAVE_SWITCH_STACK                    \
55         movl r28=1f;                            \
56         ;;                                      \
57         .fframe IA64_SWITCH_STACK_SIZE;         \
58         adds sp=-IA64_SWITCH_STACK_SIZE,sp;     \
59         mov.ret.sptk b7=r28,1f;                 \
60         SWITCH_STACK_SAVES(0);                  \
61         br.cond.sptk.many save_switch_stack;    \
62 1:
63
64 #define DO_LOAD_SWITCH_STACK                    \
65         movl r28=1f;                            \
66         ;;                                      \
67         invala;                                 \
68         mov.ret.sptk b7=r28,1f;                 \
69         br.cond.sptk.many load_switch_stack;    \
70 1:      .restore sp;                            \
71         adds sp=IA64_SWITCH_STACK_SIZE,sp