2 * BRIEF MODULE DESCRIPTION
3 * Board specific pci fixups.
5 * Copyright 2001-2003 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 * CTG 11/18/2003 Added supoprt for Au1550 SOC. The PCI block did not
30 * change from Au1500 to the Au1550. However, the boards are now
31 * using INTB for second PCI slot.
32 * This is reflected in pcibios_fixup_irqs.
35 #include <linux/config.h>
39 #include <linux/types.h>
40 #include <linux/pci.h>
41 #include <linux/kernel.h>
42 #include <linux/init.h>
44 #include <asm/au1000.h>
45 #ifdef CONFIG_MIPS_PB1000
46 #include <asm/pb1000.h>
51 #define DBG(x...) printk(x)
56 static void fixup_resource(int r_num, struct pci_dev *dev) ;
57 static unsigned long virt_io_addr;
59 void __init pcibios_fixup_resources(struct pci_dev *dev)
61 /* will need to fixup IO resources */
64 void __init pcibios_fixup(void)
66 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
68 virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
69 Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
72 printk(KERN_ERR "Unable to ioremap pci space\n");
76 #ifdef CONFIG_NONCOHERENT_IO
78 * Set the NC bit in controller for pre-AC silicon
80 au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
81 printk("Non-coherent PCI accesses enabled\n");
84 set_io_port_base(virt_io_addr);
87 #ifdef CONFIG_MIPS_PB1000 /* This is truly board specific */
88 unsigned long pci_mem_start = (unsigned long) PCI_MEM_START;
90 au_writel(0, PCI_BRIDGE_CONFIG); // set extend byte to 0
91 au_writel(0, SDRAM_MBAR); // set mbar to 0
92 au_writel(0x2, SDRAM_CMD); // enable memory accesses
95 // set extend byte to mbar of ext slot
96 au_writel(((pci_mem_start >> 24) & 0xff) |
97 (1 << 8 | 1 << 9 | 1 << 10 | 1 << 27), PCI_BRIDGE_CONFIG);
98 DBG("Set bridge config to %x\n", au_readl(PCI_BRIDGE_CONFIG));
102 void __init pcibios_fixup_irqs(void)
104 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
108 extern int au1xxx_pci_irqmap(struct pci_dev *dev, unsigned char idsel, unsigned char pin);
110 pci_for_each_dev(dev) {
111 if (dev->bus->number != 0)
115 slot = PCI_SLOT(dev->devfn);
116 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
117 dev->irq = au1xxx_pci_irqmap(dev, slot, pin);
118 //printk("Bus %d Dev %d Pin %d Irq %d\n", dev->bus->number, slot, pin, dev->irq);
119 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
120 DBG("slot %d irq %d\n", slot, dev->irq);
124 unsigned int pcibios_assign_all_busses(void)
129 static void fixup_resource(int r_num, struct pci_dev *dev)