2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994, 1995, 1996, 1998, 1999 by Ralf Baechle
7 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
8 * Copyright (C) 1994, 1995, 1996, by Andreas Busse
9 * Copyright (C) 1999 Silicon Graphics, Inc.
10 * Copyright (C) 2000 MIPS Technologies, Inc.
11 * written by Carsten Langgaard, carstenl@mips.com
13 #include <linux/config.h>
15 #include <asm/cachectl.h>
16 #include <asm/current.h>
17 #include <asm/fpregdef.h>
18 #include <asm/mipsregs.h>
19 #include <asm/offset.h>
21 #include <asm/pgtable-bits.h>
22 #include <asm/processor.h>
23 #include <asm/regdef.h>
24 #include <asm/stackframe.h>
26 #include <asm/asmmacro.h>
28 #define PF_USEDFPU 0x00100000 /* task used FPU this quantum (SMP) */
29 #define ST_OFF (KERNEL_STACK_SIZE - 32 - PT_SIZE + PT_STATUS)
32 * [jsun] FPU context is saved if and only if the process has used FPU in
33 * the current run (PF_USEDFPU). In any case, the CU1 bit for user space
34 * STATUS register should be 0, so that a process *always* starts its
35 * userland with FPU disabled after each context switch.
37 * FPU will be enabled as soon as the process accesses FPU again, through
42 * task_struct *r4xx0_resume(task_struct *prev, task_struct *next)
47 #ifndef CONFIG_CPU_HAS_LLSC
51 sw t1, THREAD_STATUS(a0)
52 CPU_SAVE_NONSCRATCH(a0)
53 sw ra, THREAD_REG31(a0)
56 * check if we need to save FPU registers
65 * clear PF_USEDFPU bit in task flags
71 * clear saved user stack CU1 bit
78 FPU_SAVE_DOUBLE(a0, t0) # clobbers t0
82 * The order of restoring the registers takes care of the race
83 * updating $28, $29 and kernelsp without disabling ints.
86 CPU_RESTORE_NONSCRATCH($28)
87 addiu t0, $28, KERNEL_STACK_SIZE-32
98 mfc0 t1, CP0_STATUS /* Do we really need this? */
101 lw a2, THREAD_STATUS($28)
111 * Save a thread's fp context.
114 FPU_SAVE_DOUBLE(a0, t1) # clobbers t1
119 * Restore a thread's fp context.
122 FPU_RESTORE_DOUBLE(a0, t1) # clobbers t1
127 * Load the FPU with signalling NANS. This bit pattern we're using has
128 * the property that no matter whether considered as single or as double
129 * precision represents signaling NANS.
131 * We initialize fcr31 to rounding to nearest, no exceptions.
134 #define FPU_DEFAULT 0x00000000