2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18 * PROM library initialisation code.
20 #include <linux/config.h>
21 #include <linux/init.h>
22 #include <linux/string.h>
23 #include <linux/kernel.h>
26 #include <asm/mips-boards/prom.h>
27 #include <asm/mips-boards/generic.h>
28 #include <asm/gt64120/gt64120.h>
29 #include <asm/mips-boards/msc01_pci.h>
30 #include <asm/mips-boards/bonito64.h>
31 #ifdef CONFIG_MIPS_MALTA
32 #include <asm/mips-boards/malta.h>
35 /* Environment variable */
42 int *_prom_argv, *_prom_envp;
45 * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
46 * This macro take care of sign extension, if running in 64-bit mode.
48 #define prom_envp(index) ((char *)(((int *)(int)_prom_envp)[(index)]))
52 unsigned int mips_revision_corid;
55 * Algorithmics Bonito64 system controller register base.
57 char * const _bonito = (char *)KSEG1ADDR(BONITO_REG_BASE);
59 char *prom_getenv(char *envname)
62 * Return a pointer to the given environment variable.
63 * In 64-bit mode: we're using 64-bit pointers, but all pointers
64 * in the PROM structures are only 32-bit, so we need some
65 * workarounds, if we are running in 64-bit mode.
71 while (prom_envp(index)) {
72 if(strncmp(envname, prom_envp(index), i) == 0) {
73 return(prom_envp(index+1));
81 static inline unsigned char str2hexnum(unsigned char c)
83 if (c >= '0' && c <= '9')
85 if (c >= 'a' && c <= 'f')
90 static inline void str2eaddr(unsigned char *ea, unsigned char *str)
94 for (i = 0; i < 6; i++) {
97 if((*str == '.') || (*str == ':'))
99 num = str2hexnum(*str++) << 4;
100 num |= (str2hexnum(*str++));
105 int get_ethernet_addr(char *ethernet_addr)
109 ethaddr_str = prom_getenv("ethaddr");
111 printk("ethaddr not set in boot prom\n");
114 str2eaddr(ethernet_addr, ethaddr_str);
116 if (init_debug > 1) {
118 printk("get_ethernet_addr: ");
120 printk("%02x:", (unsigned char)*(ethernet_addr+i));
121 printk("%02x\n", *(ethernet_addr+i));
127 int __init prom_init(int argc, char **argv, char **envp)
130 _prom_argv = (int *)argv;
131 _prom_envp = (int *)envp;
133 mips_display_message("LINUX");
135 #ifdef CONFIG_MIPS_SEAD
136 set_io_port_base(KSEG1);
138 mips_revision_corid = MIPS_REVISION_CORID;
139 switch(mips_revision_corid) {
140 case MIPS_REVISION_CORID_QED_RM5261:
141 case MIPS_REVISION_CORID_CORE_LV:
142 case MIPS_REVISION_CORID_CORE_FPGA:
144 * Setup the North bridge to do Master byte-lane swapping
145 * when running in bigendian.
147 #ifdef CONFIG_CPU_LITTLE_ENDIAN
148 GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
149 GT_PCI0_CMD_SBYTESWAP_BIT);
151 GT_WRITE(GT_PCI0_CMD_OFS, 0);
154 #ifdef CONFIG_MIPS_MALTA
155 set_io_port_base(MALTA_GT_PORT_BASE);
157 set_io_port_base(KSEG1);
161 case MIPS_REVISION_CORID_BONITO64:
162 case MIPS_REVISION_CORID_CORE_20K:
164 * Disable Bonito IOBC.
166 BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
167 ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
168 BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
171 * Setup the North bridge to do Master byte-lane swapping
172 * when running in bigendian.
174 #ifdef CONFIG_CPU_LITTLE_ENDIAN
175 BONITO_BONGENCFG = BONITO_BONGENCFG &
176 ~(BONITO_BONGENCFG_MSTRBYTESWAP |
177 BONITO_BONGENCFG_BYTESWAP);
179 BONITO_BONGENCFG = BONITO_BONGENCFG |
180 BONITO_BONGENCFG_MSTRBYTESWAP |
181 BONITO_BONGENCFG_BYTESWAP;
184 #ifdef CONFIG_MIPS_MALTA
185 set_io_port_base(MALTA_BONITO_PORT_BASE);
187 set_io_port_base(KSEG1);
191 case MIPS_REVISION_CORID_CORE_MSC:
192 #ifdef CONFIG_MIPS_MALTA
193 set_io_port_base(MALTA_MSC_PORT_BASE);
195 #ifdef CONFIG_CPU_LITTLE_ENDIAN
196 MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
198 MSC_WRITE(MSC01_PCI_SWAP,
199 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
200 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
201 MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
205 /* Unknown Core card */
206 mips_display_message("CC Error");
207 while(1); /* We die here... */
210 prom_printf("\nLINUX started...\n");