port more changes to make PCI work

diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index a3d3137..3b254d1 100644 (file)
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -161,27 +161,64 @@ static u_char sandpoint_openpic_initsenses[] __initdata = {
 /*
  * Motorola SPS Sandpoint interrupt routing.
  */
 /*
  * Motorola SPS Sandpoint interrupt routing.
  */

+#if 0 //REX: by MUSENKI

 static inline int
 sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
 {
        static char pci_irq_table[][4] =
 static inline int
 sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
 {
        static char pci_irq_table[][4] =

-           /*
-            *      PCI IDSEL/INTPIN->INTLINE
-            *         A   B   C   D
-            */
-// REX
-#if 0
+       /*
+        *      PCI IDSEL/INTPIN->INTLINE 
+        *         A   B   C   D
+        */

        {
        {

-               {16,  0,  0,  0},       /* IDSEL 11 - i8259 on Windbond */
-               { 0,  0,  0,  0},       /* IDSEL 12 - unused */
-               {17, 18, 19, 20},       /* IDSEL 13 - PCI slot 1 */
-               {18, 19, 20, 17},       /* IDSEL 14 - PCI slot 2 */
-               {19, 20, 17, 18},       /* IDSEL 15 - PCI slot 3 */
-               {20, 17, 18, 19},       /* IDSEL 16 - PCI slot 4 */
+               { SANDPOINT_SIO_IRQ,
+                      0,  0,  0 },     /* IDSEL 11 - i8259 on Winbond */
+               {  0,  0,  0,  0 },     /* IDSEL 12 - unused */
+#ifdef CONFIG_SANDPOINT_X3
+               { 17, 18, 19, 20 },     /* IDSEL 13 - PCI slot 1 */
+               { 18, 19, 20, 17 },     /* IDSEL 14 - PCI slot 2 */
+               { 19, 20, 17, 18 },     /* IDSEL 15 - PCI slot 3 */
+               { 20, 17, 18, 19 },     /* IDSEL 16 - PCI slot 4 */
+#else
+               { 16, 19, 18, 17 },     /* IDSEL 13 - PCI slot 1 */
+               { 17, 16, 19, 18 },     /* IDSEL 14 - PCI slot 2 */
+               { 18, 17, 16, 19 },     /* IDSEL 15 - PCI slot 3 */
+               { 19, 18, 17, 16 },     /* IDSEL 16 - PCI slot 4 */
+#endif

        };
 
        const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;
        };
 
        const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;

+       return PCI_IRQ_TABLE_LOOKUP;
+}
+#endif
+#if 0          //+Bing modified 11252004
+static inline int
+sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+       static char pci_irq_table[][4] =
+       /*
+        *      PCI IDSEL/INTPIN->INTLINE 
+        *         A   B   C   D
+        */
+       {
+               {   3,  0,  0,  0 },    /* IDSEL 17 - disable */
+               {   0,  0,  0,  0 },    /* IDSEL 18 - PCI slot1*/
+               {   2,  0,  0,  0 },    /* IDSEL 19 - LAN 83815 */
+               {   1,  0,  4,  0 }     /* IDSEL 20 - PCI slot2 */
+       };
+
+       const long min_idsel = 17, max_idsel = 20, irqs_per_slot = 4;
+       return PCI_IRQ_TABLE_LOOKUP;
+}

 #else
 #else

+static inline int
+sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+       static char pci_irq_table[][4] =
+       /*
+        *      PCI IDSEL/INTPIN->INTLINE 
+        *         A   B   C   D
+        */

        {
                {   0,  0,  0,  0 },    /* IDSEL 13 - mini-PCI */
                {   1,  -1,  2,  0 },    /* IDSEL 14 - NEC USB2.0 */
        {
                {   0,  0,  0,  0 },    /* IDSEL 13 - mini-PCI */
                {   1,  -1,  2,  0 },    /* IDSEL 14 - NEC USB2.0 */


@@ -190,9 +227,10 @@ sandpoint_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
        };
 
        const long min_idsel = 13, max_idsel = 16, irqs_per_slot = 4;
        };
 
        const long min_idsel = 13, max_idsel = 16, irqs_per_slot = 4;

-#endif

        return PCI_IRQ_TABLE_LOOKUP;
 }
        return PCI_IRQ_TABLE_LOOKUP;
 }

+#endif //+Bing modified 11252004
+

 
 #if 0 //REX
 static void __init
 
 #if 0 //REX
 static void __init

diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 9e09afc..62bb831 100644 (file)
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -471,7 +471,7 @@ static int show_dev_config(struct seq_file *m, void *v)
                seq_printf(m, "    Class %04x", class_rev >> 16);
        seq_printf(m, ": %s (rev %d).\n", dev->name, class_rev & 0xff);
 
                seq_printf(m, "    Class %04x", class_rev >> 16);
        seq_printf(m, ": %s (rev %d).\n", dev->name, class_rev & 0xff);
 

-       if (dev->irq)
+       //if (dev->irq)         //+Bing modified 01122005

                seq_printf(m, "      IRQ %d.\n", dev->irq);
 
        if (latency || min_gnt || max_lat) {
                seq_printf(m, "      IRQ %d.\n", dev->irq);
 
        if (latency || min_gnt || max_lat) {

diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c
index 4c65b2e..da8bd90 100644 (file)
--- a/drivers/pci/setup-irq.c
+++ b/drivers/pci/setup-irq.c
@@ -49,15 +49,22 @@ pdev_fixup_irq(struct pci_dev *dev,
        slot = (*swizzle)(dev, &pin);
 
        irq = (*map_irq)(dev, slot, pin);
        slot = (*swizzle)(dev, &pin);
 
        irq = (*map_irq)(dev, slot, pin);

+#if 0  //+Bing modified 01132005

        if (irq == -1)
                irq = 0;
        if (irq == -1)
                irq = 0;

+#endif 

        dev->irq = irq;
 
        dev->irq = irq;
 

-       DBGC((KERN_ERR "PCI fixup irq: (%s) got %d\n", dev->name, dev->irq));
-
+       //DBGC((KERN_ERR "PCI fixup irq: (%s) got %d\n", dev->name, dev->irq));
+       printk("PCI fixup irq: (%s) got %d\n", dev->name, dev->irq);

        /* Always tell the device, so the driver knows what is
           the real IRQ to use; the device does not use it. */
        /* Always tell the device, so the driver knows what is
           the real IRQ to use; the device does not use it. */

+#if 0  //+Bing modified 01132005
+       pcibios_update_irq(dev, irq);
+#else
+       if( irq != -1)

        pcibios_update_irq(dev, irq);
        pcibios_update_irq(dev, irq);

+#endif 

 }
 
 void __init
 }
 
 void __init

diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 1be8bfa..3eb66ba 100644 (file)
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -64,9 +64,15 @@ qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
                        addr = buf;
                        qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
                        qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
                        addr = buf;
                        qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
                        qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));

+#if 0  //+Bing try try 12222004

                        buf += 0x1000;
                        if ((count + 0x1000) < len)
                                count += 0x1000;
                        buf += 0x1000;
                        if ((count + 0x1000) < len)
                                count += 0x1000;

+#else
+                       buf += 0x4000;
+                       if ((count + 0x4000) < len)
+                               count += 0x4000;
+#endif

                        else
                                count = len;
                }
                        else
                                count = len;
                }

diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h
index f2566a0..93fa4f1 100644 (file)
--- a/include/asm-ppc/mpc10x.h
+++ b/include/asm-ppc/mpc10x.h
@@ -111,8 +111,13 @@
 #define        MPC10X_CFG_MAPB_OPTIONS_CFAE    0x80    /* CPU_FD_ALIAS_EN */
 #define        MPC10X_CFG_MAPB_OPTIONS_PFAE    0x40    /* PCI_FD_ALIAS_EN */
 #define        MPC10X_CFG_MAPB_OPTIONS_DR      0x20    /* DLL_RESET */
 #define        MPC10X_CFG_MAPB_OPTIONS_CFAE    0x80    /* CPU_FD_ALIAS_EN */
 #define        MPC10X_CFG_MAPB_OPTIONS_PFAE    0x40    /* PCI_FD_ALIAS_EN */
 #define        MPC10X_CFG_MAPB_OPTIONS_DR      0x20    /* DLL_RESET */

+#if 0  //+Bing modified 11302004

 #define        MPC10X_CFG_MAPB_OPTIONS_PCICH   0x80    /* PCI_COMPATIBILITY_HOLE */
 #define        MPC10X_CFG_MAPB_OPTIONS_PROCCH  0x40    /* PROC_COMPATIBILITY_HOLE */
 #define        MPC10X_CFG_MAPB_OPTIONS_PCICH   0x80    /* PCI_COMPATIBILITY_HOLE */
 #define        MPC10X_CFG_MAPB_OPTIONS_PROCCH  0x40    /* PROC_COMPATIBILITY_HOLE */

+#else
+#define        MPC10X_CFG_MAPB_OPTIONS_PCICH   0x08    /* PCI_COMPATIBILITY_HOLE */
+#define        MPC10X_CFG_MAPB_OPTIONS_PROCCH  0x04    /* PROC_COMPATIBILITY_HOLE */
+#endif //+Bing modified 11302004

 
 /* Define offsets for the memory controller registers in the config space */
 #define MPC10X_MCTLR_MEM_START_1       0x80    /* Banks 0-3 */
 
 /* Define offsets for the memory controller registers in the config space */
 #define MPC10X_MCTLR_MEM_START_1       0x80    /* Banks 0-3 */