ARM: tegra: Switch CPU to PLLP before powergating on Tegra30
authorDmitry Osipenko <digetx@gmail.com>
Mon, 27 Aug 2018 00:58:11 +0000 (03:58 +0300)
committerDmitry Osipenko <digetx@gmail.com>
Sat, 9 Feb 2019 19:15:51 +0000 (22:15 +0300)
commit4a0bf95f8be791e1f58c34e678e44314ab35be5d
treef678f3120612a7a160a2df12b7cfe3bac73317a0
parenta2d9082c86818a9151a2a850f3f80aec7c793b70
ARM: tegra: Switch CPU to PLLP before powergating on Tegra30

PLLX is getting turned by the HW logic when CPU enters powergated state
and there is no enough time for PLLX to re-lock on exiting the low-power
state, this causes memory errors coming from misbehaving CPU and eventual
hanging of the system.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
arch/arm/mach-tegra/sleep-tegra30.S