d-cache-line-size = <20>;
i-cache-size = <4000>;
d-cache-size = <4000>;
- timebase-frequency = <0>; // from bootloader
- clock-frequency = <0>; // from bootloader
+ timebase-frequency = <1A0446>; // from bootloader
+ clock-frequency = <140801C>; // from bootloader
};
};
memory {
device_type = "memory";
- reg = <00000000 00000000>; // from bootloader
+ reg = <00000000 02000000>; // 32M at 0x0
};
soc8245@fc000000 {
device_type = "soc";
+ compatible = "mpc10x";
+ store-gathering = <0>; /* 0 == off, !0 == on */
ranges = <80000000 80000000 70000000 // pci mem space
- fc000000 fc000000 00100000 // EUMB
- fe000000 fe000000 00c00000 // pci i/o space
- fec00000 fec00000 00300000 // pci cfg regs
- fef00000 fef00000 00100000 // pci iack
- ff080000 ff080000 00000040>; // UARTs
+ fc000000 fc000000 00c00000 // pci i/o space (EUMB)
+ fcc00000 fcc00000 00300000 // pci cfg regs
+ fcf00000 fcf00000 00100000 // pci iack
+ fc004500 fc004500 00000200>; // UARTs
reg = <fc000000 00100000>;
#address-cells = <1>;
#size-cells = <1>;
i2c@fc003000 {
device_type = "i2c";
compatible = "fsl-i2c";
- clock-frequency = <0>;
+ //clock-frequency = <0>;
reg = <fc003000 1000>;
interrupts = <32 0>;
interrupt-parent = <40000>;
#address-cells = <0>;
};
- pci@fec00000 {
+ pci@fcc00000 {
device_type = "pci";
- compatible = "8245";
- reg = <fec00000 00400000>;
- ranges = <01000000 0 0 fe000000 0 00c00000
+ //compatible = "8245";
+ compatible = "mpc10x-pci";
+ reg = <fcc00000 00400000>;
+ ranges = <01000000 0 0 fc000000 0 00c00000
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
interrupt-parent = <40000>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
+ /* IDSEL 11 - IRQ0 ETH */
+ 5800 0 0 1 4400 0 1
+ 5800 0 0 2 4400 1 1
+ 5800 0 0 3 4400 2 1
+ 5800 0 0 4 4400 3 1
+ /* IDSEL 12 - IRQ1 IDE0 */
+ 6000 0 0 1 4400 1 1
+ 6000 0 0 2 4400 2 1
+ 6000 0 0 3 4400 3 1
+ 6000 0 0 4 4400 0 1
+ /* IDSEL 13 - IRQ2 IDE0 */
+ 6800 0 0 1 4400 2 1
+ 6800 0 0 2 4400 2 1
+ 6800 0 0 3 4400 3 1
+ 6800 0 0 4 4400 0 1
+ /* IDSEL 14 - IRQ3 USB2.0 */
+ 7000 0 0 1 4400 3 1
+ 7000 0 0 2 4400 3 1
+ 7000 0 0 3 4400 3 1
+ 7000 0 0 4 4400 3 1
+ /* IDSEL 15 - IRQ3 ADM983 */
+ 7000 0 0 1 4400 3 1
+ 7000 0 0 2 4400 3 1
+ 7000 0 0 3 4400 3 1
+ 7000 0 0 4 4400 3 1
// IDSEL 16
8000 0 0 1 40000 0 1
8000 0 0 2 40000 1 1
#interrupt-cells = <1>;
};
- serial@ff080000 {
- device_type = "serial";
- compatible = "ns16550";
- reg = <ff080000 8>;
- clock-frequency = <e10000>;
- current-speed = <1c200>;
- interrupts = <5 1>;
- interrupt-parent = <40000>;
- };
-
- serial@ff080010 {
+ serial@fc004500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ff080010 8>;
- clock-frequency = <e10000>;
- current-speed = <1c200>;
+ reg = <fc004500 8>;
+ clock-frequency = <0>; // e10000,5d08d88
+ current-speed = <1c200>; // 2580
interrupts = <5 1>;
interrupt-parent = <40000>;
};
- serial@ff080020 {
+ serial@fc004600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ff080020 8>;
- clock-frequency = <e10000>;
- current-speed = <1c200>;
- interrupts = <5 1>;
- interrupt-parent = <40000>;
- };
-
- serial@ff080030 {
- device_type = "serial";
- compatible = "ns16550";
- reg = <ff080030 8>;
- clock-frequency = <e10000>;
+ reg = <fc004600 8>;
+ clock-frequency = <0>;
current-speed = <1c200>;
interrupts = <5 1>;
interrupt-parent = <40000>;
};
- };
- nvram@ff000000 {
- device_type = "nvram";
- reg = <ff000000 7fff0>;
};
- rtc@ff07fff8 {
- device_type = "rtc";
- reg = <ff07fff8 8>;
- };
};
#include <linux/mc146818rtc.h>
#include <asm/time.h>
-#include <asm/i8259.h>
-#include <asm/udbg.h>
#include <asm/mpic.h>
-
-static unsigned char *nvram_base = (unsigned char *)NULL;
-static ssize_t nvram_size = 0;
+#include <asm/mpc10x.h>
+#include <asm/pci-bridge.h>
static int __init
kvme080_probe(void)
struct pci_controller *hose;
int *bus_range;
+ printk("Adding PCI host bridge %s\n", dnp->full_name);
+
bus_range = (int *) get_property(dnp, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int))
printk(KERN_WARNING "Can't get bus-range for %s, assume"
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
hose->set_cfg_type = 1;
- setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
+ setup_indirect_pci(hose, 0xfcc00000, 0xfce00000);
printk(KERN_INFO "Found PCI host bridge %s", dnp->full_name);
for (dnp = NULL; (dnp=of_find_node_by_type(dnp,"pci")) != NULL;)
kvme080_setup_pci(dnp);
- dnp = of_find_node_by_type(NULL, "nvram");
- if (dnp) {
- prop = of_get_address(dnp, 0, &size, NULL);
- paddr = (phys_addr_t)of_translate_address(dnp, prop);
- if (paddr != (phys_addr_t)OF_BAD_ADDR) {
- nvram_size = (ssize_t) size;
- nvram_base = ioremap(paddr, nvram_size);
- }
- }
-
printk(KERN_INFO "Etin Systems KVME080 Board\n");
printk(KERN_INFO "Port by Sangmoon Kim (dogoil@etinsys.com)\n");
}
mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET, 0, 0,
"EPIC");
+ BUG_ON(mpic == NULL);
prop = (u32 *)get_property(dnp, "serial-mode", &size);
if (prop != NULL)
mpic_set_serial_int(mpic, *(u32 *)prop);
+ /* PCI IRQs */
mpic_assign_isu(mpic, 0, paddr + 0x10200);
+
+ /* I2C */
+ mpic_assign_isu(mpic, 1, paddr + 0x11020);
+
+ /* ttyS0 */
+ mpic_assign_isu(mpic, 2, paddr + 0x11120);
+
+ /* ttyS1 */
+ mpic_assign_isu(mpic, 3, paddr + 0x11140);
+
mpic_init(mpic);
}