interrupts: Do not clear raised bit twice

[simavr] / README

diff --git a/README b/README
index bc153a9..8266957 100644 (file)
--- a/README
+++ b/README
@@ -1,10 +1,10 @@
 
 simavr -- a simple, lean and mean AVR simulator
 
-http://gitorious.org/simavr
+https://github.com/buserror-uk/simavr
 
 simavr is a new AVR simulator for linux, or any platform that uses avr-gcc. It uses 
-avr-gcc own register definition to simplify creating new targets for supoortted AVR
+avr-gcc own register definition to simplify creating new targets for suported AVR
 devices.
 
 The core was made to be small and compact, and hackable so allow quick prototyping 
@@ -12,8 +12,11 @@ of an AVR project. The simulator loads .elf directly, and there is even a way to
 specify simulation parameters directly in the emulated code using an .elf section.
 
 The status of the project is the core works fine now. The supported IOs are eeprom,
-IO ports (including pin interupts), 8 bits timers (well, one of mode of the myriad),
-SPI master & slave, and the UART with tx&rx interrupts.
+watchdog, self-programming (ie bootloader), external interrupts (INT0 etc),
+IO ports (including pin interupts), 8&16 bits timers (well, some of the modes),
+SPI master & slave, ADC, and the UART with tx&rx interrupts.
+
+The only notable missing bits are i2c and XMEM bus access (for the big Megas)
 
 gdb support is implemented and works great (minus watchpoints).