The status of the project is the core works fine now. The supported IOs are eeprom,
watchdog, self-programming (ie bootloader), external interrupts (INT0 etc),
IO ports (including pin interupts), 8&16 bits timers (well, some of the modes),
-SPI master & slave, and the UART with tx&rx interrupts.
+SPI master & slave, ADC, and the UART with tx&rx interrupts.
+
+The only notable missing bits are i2c and XMEM bus access (for the big Megas)
gdb support is implemented and works great (minus watchpoints).