megax4/uart: implement u2x (double uart transmission speed)

[simavr] / simavr / cores / sim_megax4.h

diff --git a/simavr/cores/sim_megax4.h b/simavr/cores/sim_megax4.h
index 7af0bc6..5ff74fe 100644 (file)
--- a/simavr/cores/sim_megax4.h
+++ b/simavr/cores/sim_megax4.h
@@ -39,7 +39,7 @@ void mx4_init(struct avr_t * avr);
 void mx4_reset(struct avr_t * avr);
 
 /*
- * This is a template for all of the x4 devices, hopefuly
+ * This is a template for all of the x4 devices, hopefully
  */
 struct mcu_t {
        avr_t core;
@@ -61,7 +61,7 @@ struct mcu_t {
 #error SIM_MMCU is not declared
 #endif
 
-struct mcu_t SIM_CORENAME = {
+const struct mcu_t SIM_CORENAME = {
        .core = {
                .mmcu = SIM_MMCU,
                DEFAULT_CORE(4),
@@ -119,8 +119,11 @@ struct mcu_t SIM_CORENAME = {
                .name = '0',
                .r_udr = UDR0,
 
+               .u2x = AVR_IO_REGBIT(UCSR0A, U2X0),
                .txen = AVR_IO_REGBIT(UCSR0B, TXEN0),
                .rxen = AVR_IO_REGBIT(UCSR0B, RXEN0),
+               .ucsz = AVR_IO_REGBITS(UCSR0C, UCSZ00, 0x3), // 2 bits
+               .ucsz2 = AVR_IO_REGBIT(UCSR0B, UCSZ02),         // 1 bits
 
                .r_ucsra = UCSR0A,
                .r_ucsrb = UCSR0B,
@@ -148,8 +151,11 @@ struct mcu_t SIM_CORENAME = {
                .name = '1',
                .r_udr = UDR1,
 
+               .u2x = AVR_IO_REGBIT(UCSR1A, U2X1),
                .txen = AVR_IO_REGBIT(UCSR1B, TXEN1),
                .rxen = AVR_IO_REGBIT(UCSR1B, RXEN1),
+               .ucsz = AVR_IO_REGBITS(UCSR1C, UCSZ10, 0x3), // 2 bits
+               .ucsz2 = AVR_IO_REGBIT(UCSR1B, UCSZ12),         // 1 bits
 
                .r_ucsra = UCSR1A,
                .r_ucsrb = UCSR1B,
@@ -178,6 +184,8 @@ struct mcu_t SIM_CORENAME = {
                                        AVR_IO_REGBIT(ADMUX, MUX2), AVR_IO_REGBIT(ADMUX, MUX3),
                                        AVR_IO_REGBIT(ADMUX, MUX4),},
                .ref = { AVR_IO_REGBIT(ADMUX, REFS0), AVR_IO_REGBIT(ADMUX, REFS1)},
+               .ref_values = { [1] = ADC_VREF_AVCC, [2] = ADC_VREF_V110, [3] = ADC_VREF_V256 },
+
                .adlar = AVR_IO_REGBIT(ADMUX, ADLAR),
                .r_adcsra = ADCSRA,
                .aden = AVR_IO_REGBIT(ADCSRA, ADEN),
@@ -191,6 +199,30 @@ struct mcu_t SIM_CORENAME = {
                .r_adcsrb = ADCSRB,
                .adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
 
+               .muxmode = {
+                       [0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
+                       [2] = AVR_ADC_SINGLE(2), [3] = AVR_ADC_SINGLE(3),
+                       [4] = AVR_ADC_SINGLE(4), [5] = AVR_ADC_SINGLE(5),
+                       [6] = AVR_ADC_SINGLE(6), [7] = AVR_ADC_SINGLE(7),
+
+                       [ 8] = AVR_ADC_DIFF(0, 0,  10), [ 9] = AVR_ADC_DIFF(1, 0,  10),
+                       [10] = AVR_ADC_DIFF(0, 0, 200), [11] = AVR_ADC_DIFF(1, 0, 200),
+                       [12] = AVR_ADC_DIFF(2, 2,  10), [13] = AVR_ADC_DIFF(3, 2,  10),
+                       [14] = AVR_ADC_DIFF(2, 2, 200), [15] = AVR_ADC_DIFF(3, 2, 200),
+
+                       [16] = AVR_ADC_DIFF(0, 1,   1), [17] = AVR_ADC_DIFF(1, 1,   1),
+                       [18] = AVR_ADC_DIFF(2, 1,   1), [19] = AVR_ADC_DIFF(3, 1,   1),
+                       [20] = AVR_ADC_DIFF(4, 1,   1), [21] = AVR_ADC_DIFF(5, 1,   1),
+                       [22] = AVR_ADC_DIFF(6, 1,   1), [23] = AVR_ADC_DIFF(7, 1,   1),
+
+                       [24] = AVR_ADC_DIFF(0, 2,   1), [25] = AVR_ADC_DIFF(1, 2,   1),
+                       [26] = AVR_ADC_DIFF(2, 2,   1), [27] = AVR_ADC_DIFF(3, 2,   1),
+                       [28] = AVR_ADC_DIFF(4, 2,   1), [29] = AVR_ADC_DIFF(5, 2,   1),
+
+                       [30] = AVR_ADC_REF(1100),       // 1.1V
+                       [31] = AVR_ADC_REF(0),          // GND
+               },
+
                .adc = {
                        .enable = AVR_IO_REGBIT(ADCSRA, ADIE),
                        .raised = AVR_IO_REGBIT(ADCSRA, ADIF),
@@ -219,6 +251,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0A,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0A),
                                        .raised = AVR_IO_REGBIT(TIFR0, OCF0A),
@@ -227,6 +261,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR0B,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0B),
                                        .raised = AVR_IO_REGBIT(TIFR0, OCF0B),
@@ -242,6 +278,9 @@ struct mcu_t SIM_CORENAME = {
                                        AVR_IO_REGBIT(TCCR1B, WGM12), AVR_IO_REGBIT(TCCR1B, WGM13) },
                .wgm_op = {
                        [0] = AVR_TIMER_WGM_NORMAL16(),
+                       [1] = AVR_TIMER_WGM_FCPWM8(),
+                       [2] = AVR_TIMER_WGM_FCPWM9(),
+                       [3] = AVR_TIMER_WGM_FCPWM10(),
                        [4] = AVR_TIMER_WGM_CTC(),
                        [5] = AVR_TIMER_WGM_FASTPWM8(),
                        [6] = AVR_TIMER_WGM_FASTPWM9(),
@@ -254,9 +293,12 @@ struct mcu_t SIM_CORENAME = {
                .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */  /* External clock T1 is not handled */},
 
                .r_tcnt = TCNT1L,
+               .r_tcnth = TCNT1H,
                .r_icr = ICR1L,
                .r_icrh = ICR1H,
-               .r_tcnth = TCNT1H,
+
+               .ices = AVR_IO_REGBIT(TCCR1B, ICES1),
+               .icp = AVR_IO_REGBIT(PORTD, 6),
 
                .overflow = {
                        .enable = AVR_IO_REGBIT(TIMSK1, TOIE1),
@@ -272,6 +314,8 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1A),
                                        .raised = AVR_IO_REGBIT(TIFR1, OCF1A),
@@ -281,6 +325,8 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1B),
                                        .raised = AVR_IO_REGBIT(TIFR1, OCF1B),
@@ -314,6 +360,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR2A,
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 7),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2A),
                                        .raised = AVR_IO_REGBIT(TIFR2, OCF2A),
@@ -322,6 +370,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR2B,
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 6),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2B),
                                        .raised = AVR_IO_REGBIT(TIFR2, OCF2B),
@@ -369,7 +419,8 @@ struct mcu_t SIM_CORENAME = {
 
                .twi = {
                        .enable = AVR_IO_REGBIT(TWCR, TWIE),
-                       .raised = AVR_IO_REGBIT(TWSR, TWINT),
+                       .raised = AVR_IO_REGBIT(TWCR, TWINT),
+                       .raise_sticky = 1,
                        .vector = TWI_vect,
                },
        },