/****************************************************************************
TWI State codes
****************************************************************************/
-// General TWI Master staus codes
+// General TWI Master status codes
#define TWI_START 0x08 // START has been transmitted
#define TWI_REP_START 0x10 // Repeated START has been transmitted
#define TWI_ARB_LOST 0x38 // Arbitration lost
-// TWI Master Transmitter staus codes
-#define TWI_MTX_ADR_ACK 0x18 // SLA+W has been tramsmitted and ACK received
-#define TWI_MTX_ADR_NACK 0x20 // SLA+W has been tramsmitted and NACK received
-#define TWI_MTX_DATA_ACK 0x28 // Data byte has been tramsmitted and ACK received
-#define TWI_MTX_DATA_NACK 0x30 // Data byte has been tramsmitted and NACK received
+// TWI Master Transmitter status codes
+#define TWI_MTX_ADR_ACK 0x18 // SLA+W has been transmitted and ACK received
+#define TWI_MTX_ADR_NACK 0x20 // SLA+W has been transmitted and NACK received
+#define TWI_MTX_DATA_ACK 0x28 // Data byte has been transmitted and ACK received
+#define TWI_MTX_DATA_NACK 0x30 // Data byte has been transmitted and NACK received
-// TWI Master Receiver staus codes
-#define TWI_MRX_ADR_ACK 0x40 // SLA+R has been tramsmitted and ACK received
-#define TWI_MRX_ADR_NACK 0x48 // SLA+R has been tramsmitted and NACK received
-#define TWI_MRX_DATA_ACK 0x50 // Data byte has been received and ACK tramsmitted
-#define TWI_MRX_DATA_NACK 0x58 // Data byte has been received and NACK tramsmitted
+// TWI Master Receiver status codes
+#define TWI_MRX_ADR_ACK 0x40 // SLA+R has been transmitted and ACK received
+#define TWI_MRX_ADR_NACK 0x48 // SLA+R has been transmitted and NACK received
+#define TWI_MRX_DATA_ACK 0x50 // Data byte has been received and ACK transmitted
+#define TWI_MRX_DATA_NACK 0x58 // Data byte has been received and NACK transmitted
-// TWI Slave Transmitter staus codes
+// TWI Slave Transmitter status codes
#define TWI_STX_ADR_ACK 0xA8 // Own SLA+R has been received; ACK has been returned
#define TWI_STX_ADR_ACK_M_ARB_LOST 0xB0 // Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned
#define TWI_STX_DATA_ACK 0xB8 // Data byte in TWDR has been transmitted; ACK has been received
#define TWI_STX_DATA_NACK 0xC0 // Data byte in TWDR has been transmitted; NOT ACK has been received
#define TWI_STX_DATA_ACK_LAST_BYTE 0xC8 // Last data byte in TWDR has been transmitted (TWEA = �0�); ACK has been received
-// TWI Slave Receiver staus codes
+// TWI Slave Receiver status codes
#define TWI_SRX_ADR_ACK 0x60 // Own SLA+W has been received ACK has been returned
#define TWI_SRX_ADR_ACK_M_ARB_LOST 0x68 // Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned
#define TWI_SRX_GEN_ACK 0x70 // General call address has been received; ACK has been returned
avr_regbit_clear(avr, p->twea);
avr_regbit_clear(avr, p->twsta);
avr_regbit_clear(avr, p->twsto);
- avr_clear_interrupt(avr, p->twi.vector);
+ avr_clear_interrupt(avr, &p->twi);
avr_core_watch_write(avr, p->r_twdr, 0xff);
_avr_twi_status_set(p, TWI_NO_STATE, 0);
p->state = 0;
}
/*
- * prevent code from rewriting out status bits, since we actualy use them!
+ * prevent code from rewriting out status bits, since we actually use them!
*/
static void
avr_twi_write_status(
}
static const char * irq_names[TWI_IRQ_COUNT] = {
- [TWI_IRQ_MISO] = "8<mosi",
- [TWI_IRQ_MOSI] = "32>miso",
+ [TWI_IRQ_MISO] = "8<miso",
+ [TWI_IRQ_MOSI] = "32>mosi",
[TWI_IRQ_STATUS] = "8>status",
};
avr_register_io_write(avr, p->twsr.reg, avr_twi_write_status, p);
}
+uint32_t
+avr_twi_irq_msg(
+ uint8_t msg,
+ uint8_t addr,
+ uint8_t data)
+{
+ avr_twi_msg_irq_t _msg = {
+ .u.twi.msg = msg,
+ .u.twi.addr = addr,
+ .u.twi.data = data,
+ };
+ return _msg.u.v;
+}