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Michel Pollet [Tue, 1 Dec 2009 21:47:48 +0000 (21:47 +0000)]
uart, ioports, etc. Many more changes
+ Reorganized source, split simavr.c
+ IRQ support added to IO modules
+ timer8: fixed a bug related to disabling clock
+ uart:
- Added support for txen/rxen flags
- Added a receive fifo, and the rx interupt
- added a "atmega88_uart_echo" test case
+ simavr: hook rx & tx irqs on first uart, for tests
Signed-off-by: Michel Pollet <buserror@gmail.com>
Michel Pollet [Mon, 30 Nov 2009 21:36:55 +0000 (21:36 +0000)]
Cores, decoder, uart, ioports - lots of changes
+ Cores now use eeprom declare macro
+ Cores now use the "TXCE" etc bits
+ Uart now raise TXC interupt/flag
+ ioports now use new internal IRQ system
+ New command line options for mcu, freq and trace
+ Decoder updates:
- Fixed the last known "crash" bug.
- Added cycles to most multi-cycle opcodes.
- Added optional stack frame watcher
- Skip instruction now handle 32 bits skips
Signed-off-by: Michel Pollet <buserror@gmail.com>
Michel Pollet [Tue, 24 Nov 2009 13:11:54 +0000 (13:11 +0000)]
Initial Commit
Signed-off-by: Michel Pollet <buserror@gmail.com>