we need read_verilog instead of read2022-01-21T11:44:55ZDobrica Pavlinusicdpavlin@rot13.orgDobrica Pavlinusicdpavlin@rot13.org2022-01-21T11:44:55Zhttp://git.rot13.org/?p=trilby-hat-fpga;a=commitdiff;h=302c67c98a30def10b8b8845c6f820d9e8da130b
we need read_verilog instead of read
Otherwise, all modules in recent yosys become abstract, and
optimized out
use SPI slave2022-01-06T12:26:31ZDobrica Pavlinusicdpavlin@rot13.orgDobrica Pavlinusicdpavlin@rot13.org2022-01-06T12:26:31Zhttp://git.rot13.org/?p=trilby-hat-fpga;a=commitdiff;h=8b270f00c4156c8960f0326db2bc74b45fa84287
ADE-1 frequency mixer2022-01-01T12:07:36ZDobrica Pavlinusicdpavlin@rot13.orgDobrica Pavlinusicdpavlin@rot13.org2022-01-01T12:07:36Zhttp://git.rot13.org/?p=trilby-hat-fpga;a=commitdiff;h=d21a88cd2fe7dee7531059ba0909115a8211c10a
ADE-1 frequency mixer
https://eu.mouser.com/datasheet/2/1030/ADE-1_2b-1700151.pdf
Level 7 (LO Power +7 dBm) 0.5 to 500 MHz
LTC2226CUH datasheet
https://eu.mouser.com/ProductDetail/Analog-Devices/LTC2226CUH
Analog to Digital Converters - ADC LTC2226 - 12-Bit, 25Msps Low Power 3V ADC
remove pll from original project2022-01-01T11:25:54ZDobrica Pavlinusicdpavlin@rot13.orgDobrica Pavlinusicdpavlin@rot13.org2022-01-01T11:25:54Zhttp://git.rot13.org/?p=trilby-hat-fpga;a=commitdiff;h=166b4b42c80b49fed7008077b9fd217fd0711e3f
i2c passthru bridge from rpi to tuner2021-12-30T16:24:49ZDobrica Pavlinusicdpavlin@rot13.orgDobrica Pavlinusicdpavlin@rot13.org2021-12-30T16:24:49Zhttp://git.rot13.org/?p=trilby-hat-fpga;a=commitdiff;h=9620173d39dcd3bf54fa794c0571a1e4bab183e2
reorder leds like on board2021-12-28T20:01:35ZDobrica Pavlinusicdpavlin@rot13.orgDobrica Pavlinusicdpavlin@rot13.org2021-12-28T20:01:35Zhttp://git.rot13.org/?p=trilby-hat-fpga;a=commitdiff;h=7120a1d20fb209a5a380629c773703383575f041