493b2df1c83acc35fc687311567fc68c74e15f5d
[trilby-hat-fpga] / i2c.v
1 `include "i2c_bridge.v"
2 `include "ecp5pll.sv"
3 `include "SPI_slave.v"
4
5 module top(
6         input clk,
7
8         inout rtc_sda,
9         inout rtc_scl,
10
11         inout tuner_sda,
12         inout tuner_scl,
13
14         output mhz_16,mhz_96,
15
16         output exp_pin_3, exp_pin_4,
17         output exp_pin_5, exp_pin_6,
18         output exp_pin_7, exp_pin_8,
19
20         input spi_sclk, spi_mosi, spi_cs0,
21         output spi_miso,
22
23         output green_led_d7,
24         output orange_led_d8,
25         output red_led_d5,
26         output yellow_led_d6
27
28 );
29
30         wire [3:0] clocks;
31         ecp5pll
32         #(
33                 .in_hz(24000000),
34                 .out0_hz(16000000),.out0_tol_hz(0) ,
35                 .out1_hz(96000000), .out1_deg( 0), .out1_tol_hz(0)//,
36                 //.out2_hz(60000000), .out2_deg(180), .out2_tol_hz(0),
37         )
38         ecp5pll_inst
39         (
40                 .clk_i(clk),
41                 .clk_o(clocks)
42         );
43
44         assign mhz_16 = clocks[0];
45         assign mhz_96 = clocks[1];
46
47 /*
48         assign exp_pin_4 = clocks[0];
49         assign exp_pin_8 = clocks[1];
50 */
51         assign exp_pin_4 = rtc_scl;
52         assign exp_pin_8 = rtc_sda;
53
54 /*
55         assign green_led_d7  = rtc_scl;
56         assign orange_led_d8 = rtc_sda;
57         assign red_led_d5    = tuner_scl;
58         assign yellow_led_d6 = tuner_sda;
59 */
60         assign green_led_d7  = 0;
61         assign orange_led_d8 = 0;
62         //assign red_led_d5    = tuner_scl;
63         assign yellow_led_d6 = 0;
64
65   localparam bridge_clk_div = 3; // div = 1+2^n, 24/(1+2^2)=4 MHz
66   reg [bridge_clk_div:0] bridge_cnt;
67   always @(posedge clk) // 24 MHz
68   begin
69     if(bridge_cnt[bridge_clk_div])
70       bridge_cnt <= 0;
71     else
72       bridge_cnt <= bridge_cnt + 1;
73   end
74   wire clk_bridge_en = bridge_cnt[bridge_clk_div];
75
76   wire [1:0] i2c_sda_i = {rtc_sda, tuner_sda};
77   wire [1:0] i2c_sda_t;
78   i2c_bridge i2c_sda_bridge_i
79   (
80     .clk(clk),
81     .clk_en(clk_bridge_en),
82     .i(i2c_sda_i),
83     .t(i2c_sda_t)
84   );
85   assign rtc_sda = i2c_sda_t[1] ? 1'bz : 1'b0;
86   assign tuner_sda = i2c_sda_t[0] ? 1'bz : 1'b0;
87
88   wire [1:0] i2c_scl_i = {rtc_scl, tuner_scl};
89   wire [1:0] i2c_scl_t;
90   i2c_bridge i2c_scl_bridge_i
91   (
92     .clk(clk),
93     .clk_en(clk_bridge_en),
94     .i(i2c_scl_i),
95     .t(i2c_scl_t)
96   );
97   assign rtc_scl = i2c_scl_t[1] ? 1'bz : 1'b0;
98   assign tuner_scl = i2c_scl_t[0] ? 1'bz : 1'b0;
99
100
101         SPI_slave SPI_slave(
102                 .clk(clk),
103                 .SCK(spi_sclk),
104                 .MOSI(spi_mosi),
105                 .MISO(spi_miso),
106                 .SSEL(spi_cs0),
107                 .LED(red_led_d5)
108         );
109
110 endmodule