add FPGA generated clocks mhz_16, mhz_96
authorDobrica Pavlinusic <dpavlin@rot13.org>
Thu, 30 Dec 2021 20:14:38 +0000 (21:14 +0100)
committerDobrica Pavlinusic <dpavlin@rot13.org>
Thu, 30 Dec 2021 20:15:49 +0000 (21:15 +0100)
commit619adcc915cbf7b7ded0992cd08f2438957e3a22
tree94082b60857ec6e6a75646ba67d70ba10e50ff2b
parent9620173d39dcd3bf54fa794c0571a1e4bab183e2
add FPGA generated clocks mhz_16, mhz_96
Makefile
ecp5pll.sv [new file with mode: 0644]
i2c.v