reorder leds like on board

diff --git a/blinky.v b/blinky.v
index 5740e07..0646558 100644 (file)
--- a/blinky.v
+++ b/blinky.v
@@ -43,9 +43,9 @@ module top(input clk,
     endgenerate
 
     // assign led = led_reg;
     endgenerate
 
     // assign led = led_reg;

-       assign green_led_d7  = led_reg[0];
-       assign orange_led_d8 = led_reg[1];
-       assign red_led_d5    = led_reg[2];
-       assign yellow_led_d6 = led_reg[3];
+       assign green_led_d7  = led_reg[2];
+       assign red_led_d5    = led_reg[3];
+       assign yellow_led_d6 = led_reg[4];
+       assign orange_led_d8 = led_reg[5];

 
 endmodule
 
 endmodule

diff --git a/trilby.lpf b/trilby.lpf
index 8ac95b4..85d0cec 100644 (file)
--- a/trilby.lpf
+++ b/trilby.lpf
@@ -54,16 +54,19 @@ LOCATE  COMP  "exp_pin_21"  SITE  "D14";
 LOCATE  COMP  "res_in"  SITE  "E14"; # in
 # pins 23,24 are GND
 
 LOCATE  COMP  "res_in"  SITE  "E14"; # in
 # pins 23,24 are GND
 

+
+# order like on PCB, D7, D5, D6, D8

 LOCATE  COMP  "green_led_d7"  SITE  "G16";
 LOCATE  COMP  "green_led_d7"  SITE  "G16";

-LOCATE  COMP  "orange_led_d8" SITE  "H16";

 LOCATE  COMP  "red_led_d5"    SITE  "E18";
 LOCATE  COMP  "yellow_led_d6" SITE  "F18";
 LOCATE  COMP  "red_led_d5"    SITE  "E18";
 LOCATE  COMP  "yellow_led_d6" SITE  "F18";

+LOCATE  COMP  "orange_led_d8" SITE  "H16";

 
 IOBUF PORT "green_led_d7"  IO_TYPE=LVCMOS33;
 IOBUF PORT "orange_led_d8" IO_TYPE=LVCMOS33;
 IOBUF PORT "red_led_d5"    IO_TYPE=LVCMOS33;
 IOBUF PORT "yellow_led_d6" IO_TYPE=LVCMOS33;
 
 
 IOBUF PORT "green_led_d7"  IO_TYPE=LVCMOS33;
 IOBUF PORT "orange_led_d8" IO_TYPE=LVCMOS33;
 IOBUF PORT "red_led_d5"    IO_TYPE=LVCMOS33;
 IOBUF PORT "yellow_led_d6" IO_TYPE=LVCMOS33;
 

+

 LOCATE  COMP  "mhz_16"  SITE  "L20"; # out
 LOCATE  COMP  "mhz_96"  SITE  "L17"; # out
 
 LOCATE  COMP  "mhz_16"  SITE  "L20"; # out
 LOCATE  COMP  "mhz_96"  SITE  "L17"; # out