3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 /* ide.c - ide support functions */
34 #define IT8212_PCI_CpuCONTROL 0x5e
35 #define IT8212_PCI_PciModeCONTROL 0x50
36 #define IT8212_PCI_IdeIoCONFIG 0x40
37 #define IT8212_PCI_IdeBusSkewCONTROL 0x4c
38 #define IT8212_PCI_IdeDrivingCURRENT 0x42
40 extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
41 extern struct pci_controller hose;
43 int ide_preinit (void)
50 for (l = 0; l < CFG_IDE_MAXBUS; l++) {
51 ide_bus_offset[l] = -ATA_STATUS;
53 devbusfn = pci_find_device (PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0);
55 devbusfn = pci_find_device (PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0);
59 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
60 (u32 *) &ide_bus_offset[0]);
61 ide_bus_offset[0] &= 0xfffffffe;
62 ide_bus_offset[0] = pci_hose_bus_to_phys(&hose,
63 ide_bus_offset[0] & 0xfffffffe,
65 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
66 (u32 *) &ide_bus_offset[1]);
67 ide_bus_offset[1] &= 0xfffffffe;
68 ide_bus_offset[1] = pci_hose_bus_to_phys(&hose,
69 ide_bus_offset[1] & 0xfffffffe,
73 if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) {
74 pci_write_config_byte(devbusfn, IT8212_PCI_CpuCONTROL, 0x01);
75 pci_write_config_byte(devbusfn, IT8212_PCI_PciModeCONTROL, 0x00);
76 pci_write_config_word(devbusfn, PCI_COMMAND, 0x0047);
77 #ifdef CONFIG_IT8212_SECONDARY_ENABLE
78 pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0xA0F3);
80 pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0x8031);
82 pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204);
83 // __LS_COMMENT__ BUFFALO changed 2004.11.10 changed for EMI
84 pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); // 10mA
85 // pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); // 4mA
86 // pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); // 6mA
87 // pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); // 6mA,2mA
88 // pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); // 8mA,4mA
89 pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00);
95 void ide_set_reset (int flag) {
99 #endif /* of CONFIG_CMDS_IDE */