use pin2io mapping to generate vhdl and pin assigment

diff --git a/vhdl-pingen.pl b/vhdl-pingen.pl
new file mode 100755 (executable)
index 0000000..e496546
--- /dev/null
+++ b/vhdl-pingen.pl
@@ -0,0 +1,80 @@
+#!/usr/bin/perl
+use warnings;
+use strict;
+use autodie;
+
+use Storable;
+use Data::Dump qw(dump);
+
+my $sections = 4;
+
+my $pin2io = retrieve('/dev/shm/pin2io.storable');
+warn "# $= ",dump($pin2io);
+my @pin2io = @{ $$pin2io };
+warn "# @= ",dump( @pin2io );
+
+my @ports;
+my $stat;
+my @pin_s;
+my @location_assignment,
+
+my $pins_in_section = @pin2io / $sections;
+warn "# sections: $sections with $pins_in_section pins each\n";
+
+foreach my $pin ( @pin2io ) {
+       if ( $pin =~ m/IO(\d+)/ ) {
+               my $nr = $1;
+               push @ports, "$pin: inout std_logic;";
+               my $s = int($nr/$pins_in_section);
+               push @pin_s, "$pin <= s$s;";
+               $stat->{sections}->{ $s }++;
+               push @location_assignment, $nr;
+       } else {
+               push @ports, "-- $pin";
+       }
+}
+
+$ports[$#ports] =~ s/;$//; # remove last semicolumn
+
+print qq{
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+entity epm3128 is
+ port(
+
+}, join("\n", @ports), qq {
+
+ );
+end epm3128;
+
+
+architecture rtl of epm3128 is
+
+signal }, join(", ", map { "s$_" } sort keys %{ $stat->{sections} }), qq{ : std_logic;
+
+begin
+
+};
+
+my @vals = ( 0, 1, 'Z' );
+my $i = 0;
+foreach my $s ( sort keys %{ $stat->{sections} } ) {
+       my $v = $vals[$i];
+       print qq{s$s <= '$v';\n};
+       $i++; $i = $i % 3;
+}
+
+
+print join("\n", @pin_s), qq{
+
+end rtl;
+
+};#/vhdl
+
+open(my $qsf, '>', 't.qsf');
+foreach (@location_assignment) {
+       print $qsf "set_location_assignment PIN_$_ -to IO$_\n";
+}
+