From 7f00fda4f677059784a1c4db6fa19f121a457d6e Mon Sep 17 00:00:00 2001 From: Dobrica Pavlinusic Date: Wed, 22 Jun 2016 10:55:48 +0200 Subject: [PATCH] pin mapping for dac.vhd --- vhdl/3064at44.qsf | 81 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 vhdl/3064at44.qsf diff --git a/vhdl/3064at44.qsf b/vhdl/3064at44.qsf new file mode 100644 index 0000000..cd7589c --- /dev/null +++ b/vhdl/3064at44.qsf @@ -0,0 +1,81 @@ +# -------------------------------------------------------------------------- # +# +# Copyright (C) 1991-2011 Altera Corporation +# Your use of Altera Corporation's design tools, logic functions +# and other software and tools, and its AMPP partner logic +# functions, and any output files from any of the foregoing +# (including device programming or simulation files), and any +# associated documentation or information are expressly subject +# to the terms and conditions of the Altera Program License +# Subscription Agreement, Altera MegaCore Function License +# Agreement, or other applicable license agreement, including, +# without limitation, that your use is for the sole purpose of +# programming logic devices manufactured by Altera and sold by +# Altera or its authorized distributors. Please refer to the +# applicable agreement for further details. +# +# -------------------------------------------------------------------------- # +# +# Quartus II +# Version 11.0 Build 208 07/03/2011 Service Pack 1 SJ Web Edition +# Date created = 16:00:50 June 12, 2016 +# +# -------------------------------------------------------------------------- # +# +# Notes: +# +# 1) The default values for assignments are stored in the file: +# 3064at44_assignment_defaults.qdf +# If this file doesn't exist, see file: +# assignment_defaults.qdf +# +# 2) Altera recommends that you do not modify this file. This +# file is updated automatically by the Quartus II software +# and any changes you make may be lost or overwritten. +# +# -------------------------------------------------------------------------- # + + +set_global_assignment -name FAMILY MAX3000A +set_global_assignment -name DEVICE "EPM3064ATC44-10" +set_global_assignment -name TOP_LEVEL_ENTITY dac +set_global_assignment -name ORIGINAL_QUARTUS_VERSION "11.0 SP1" +set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:00:50 JUNE 12, 2016" +set_global_assignment -name LAST_QUARTUS_VERSION "11.0 SP1" +set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1" +set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF +set_global_assignment -name FITTER_EFFORT "STANDARD FIT" +set_global_assignment -name MAX7000_DEVICE_IO_STANDARD "3.3-V LVTTL" +set_global_assignment -name USE_CONFIGURATION_DEVICE ON +set_global_assignment -name GENERATE_SVF_FILE ON +set_global_assignment -name GENERATE_ISC_FILE OFF +set_global_assignment -name GENERATE_JAM_FILE OFF +set_global_assignment -name GENERATE_JBC_FILE OFF +set_location_assignment PIN_23 -to dac_a[4] +set_location_assignment PIN_22 -to dac_a[3] +set_location_assignment PIN_21 -to dac_a[2] +set_location_assignment PIN_20 -to dac_a[1] +set_location_assignment PIN_19 -to dac_a[0] +set_location_assignment PIN_25 -to dac_b[4] +set_location_assignment PIN_27 -to dac_b[3] +set_location_assignment PIN_28 -to dac_b[2] +set_location_assignment PIN_31 -to dac_b[1] +set_location_assignment PIN_33 -to dac_b[0] +set_location_assignment PIN_10 -to clk +set_location_assignment PIN_14 -to test_port[7] +set_location_assignment PIN_15 -to test_port[6] +set_location_assignment PIN_18 -to test_port[5] +set_location_assignment PIN_34 -to test_port[4] +set_location_assignment PIN_35 -to test_port[3] +set_location_assignment PIN_42 -to test_port[2] +set_location_assignment PIN_43 -to test_port[1] +set_location_assignment PIN_44 -to test_port[0] +set_location_assignment PIN_2 -to test_port[14] +set_location_assignment PIN_3 -to test_port[13] +set_location_assignment PIN_5 -to test_port[12] +set_location_assignment PIN_6 -to test_port[11] +set_location_assignment PIN_8 -to test_port[10] +set_location_assignment PIN_12 -to test_port[9] +set_location_assignment PIN_13 -to test_port[8] +set_global_assignment -name VHDL_FILE gz_16o8i.vhd +set_global_assignment -name VHDL_FILE dac.vhd \ No newline at end of file -- 2.20.1