2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates, the maximimum clock rates are defined on
24 page 4 of the spec. They vary, but are roughly 30MHz. Raising
25 this clock rate might allow for clock glitching, but the GoodFET
26 isn't sufficient fast for that. Perhaps a 200MHz ARM or an FPGA in
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 #define CCDELAY(x) delay(x)
42 #define SETMOSI P5OUT|=MOSI
43 #define CLRMOSI P5OUT&=~MOSI
44 #define SETCLK P5OUT|=SCK
45 #define CLRCLK P5OUT&=~SCK
46 #define READMISO (P5IN&MISO?1:0)
48 #define CCWRITE P5DIR|=MOSI
49 #define CCREAD P5DIR&=~MISO
51 //! Set up the pins for CC mode. Does not init debugger.
55 //P5DIR&=~MISO; //MOSI is MISO
61 //! Initialize the debugger
63 delay(30); //So the beginning is ready for glitching.
65 //Two positive debug clock pulses while !RST is low.
66 //Take RST low, pulse twice, then high.
84 //! Read and write a CC bit.
85 unsigned char cctrans8(unsigned char byte){
87 //This function came from the SPI Wikipedia article.
90 for (bit = 0; bit < 8; bit++) {
91 /* write MOSI on trailing edge of previous clock */
98 /* half a clock cycle before leading/rising edge */
102 /* half a clock cycle before trailing/falling edge */
105 /* read MISO on trailing edge */
113 //! Send a command from txbytes.
114 void cccmd(unsigned char len){
118 cctrans8(cmddata[i]);
121 //! Fetch a reply, usually 1 byte.
122 void ccread(unsigned char len){
126 cmddata[i]=cctrans8(0);
129 //! Handles a monitor command.
130 void cchandle(unsigned char app,
133 //Always init. Might help with buggy lines.
139 //CC_PEEK and CC_POKE will come later.
141 cmddata[0]=cc_peekirambyte(cmddata[0]);
145 cmddata[0]=cc_pokeirambyte(cmddata[0],cmddata[1]);
148 case READ: //Write a command and return 1-byte reply.
155 case WRITE: //Write a command with no reply.
159 case START://enter debugger
164 case STOP://exit debugger
165 //Take RST low, then high.
182 cc_wr_config(cmddata[0]);
195 //no break, return status
200 case CC_SET_HW_BRKPNT:
201 cc_set_hw_brkpnt(cmddataword[0]);
220 case CC_STEP_REPLACE:
221 txdata(app,NOK,0);//TODO add me
224 cmddataword[0]=cc_get_chip_id();
230 case CC_READ_CODE_MEMORY:
231 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
234 case CC_READ_XDATA_MEMORY:
235 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
238 case CC_WRITE_XDATA_MEMORY:
239 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
243 cc_set_pc(cmddatalong[0]);
246 case CC_WRITE_FLASH_PAGE:
247 cc_write_flash_page(cmddatalong[0]);
250 case CC_WIPEFLASHBUFFER:
251 for(i=0xf000;i<0xf800;i++)
252 cc_pokedatabyte(i,0xFF);
255 case CC_MASS_ERASE_FLASH:
257 case CC_PROGRAM_FLASH:
258 debugstr("This Chipcon command is not yet implemented.");
259 txdata(app,NOK,0);//TODO implement me.
264 //! Set the Chipcon's Program Counter
265 void cc_set_pc(u32 adr){
266 cmddata[0]=0x02; //SetPC
267 cmddata[1]=((adr>>8)&0xff); //HIBYTE
268 cmddata[2]=adr&0xff; //LOBYTE
273 //! Erase all of a Chipcon's memory.
274 void cc_chip_erase(){
275 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
279 //! Write the configuration byte.
280 void cc_wr_config(unsigned char config){
281 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
291 //debugstr("Locking chip.");
292 cc_wr_config(1);//Select Info Flash
293 if(!(cc_rd_config()&1))
294 debugstr("Config forgotten!");
298 cc_pokedatabyte(0xf000+i,0);
299 cc_write_flash_page(0);
300 if(cc_peekcodebyte(0))
301 debugstr("Failed to clear info flash byte.");
305 debugstr("Stuck in info flash mode!");
308 //! Read the configuration byte.
309 unsigned char cc_rd_config(){
310 cmddata[0]=CCCMD_RD_CONFIG; //0x24
317 //! Read the status register
318 unsigned char cc_read_status(){
319 cmddata[0]=CCCMD_READ_STATUS; //0x3f
325 //! Read the CHIP ID bytes.
326 unsigned short cc_get_chip_id(){
327 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
332 //Find the flash word size.
337 flash_word_size=0x02;
338 //debugstr("2 bytes/flash word");
341 debugstr("Warning: Guessing flash word size.");
344 //debugstr("4 bytes/flash word");
345 flash_word_size=0x04;
350 return cmddataword[0];
353 //! Populates flash buffer in xdata.
354 void cc_write_flash_buffer(u8 *data, u16 len){
355 cc_write_xdata(0xf000, data, len);
357 //! Populates flash buffer in xdata.
358 void cc_write_xdata(u16 adr, u8 *data, u16 len){
360 for(i=0; i<len; i++){
361 cc_pokedatabyte(adr+i,
367 //32-bit words, 2KB pages
368 //0x20 0x00 for CC2430, CC1110
369 #define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
370 #define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
372 /** Ugh, this varies by chip.
376 //#define FLASHPAGE_SIZE 0x400
377 #define MAXFLASHPAGE_SIZE 0x800
378 #define MINFLASHPAGE_SIZE 0x400
381 //32 bit words on CC2430
382 //16 bit words on CC1110
383 //#define FLASH_WORD_SIZE 0x2
384 u8 flash_word_size = 0; //0x02;
387 /* Flash Write Timing
394 32 | 0x2A (Modula.si)
398 const u8 flash_routine[] = {
402 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
404 //0x75, 0xAB, 0x23, //Set FWT per clock
405 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
407 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
408 // ; Wait for flash erase to complete
409 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
410 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
412 /* End erase page. */
413 // ; Initialize the data pointer
414 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
416 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
417 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
418 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
421 0x7D, 0xde /*FLASH_WORD_SIZE*/, // writeLoop: MOV R5, #imm;
422 0xE0, // writeWordLoop: MOVX A, @DPTR;
424 0xF5, 0xAF, // MOV FWDATA, A;
425 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
426 // ; Wait for completion
427 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
428 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
429 0xDE, 0xF1, // DJNZ R6, writeLoop;
430 0xDF, 0xEF, // DJNZ R7, writeLoop;
431 // ; Done, fake a breakpoint
436 //! Copies flash buffer to flash.
437 void cc_write_flash_page(u32 adr){
438 //Assumes that page has already been written to XDATA 0xF000
439 //debugstr("Flashing 2kb at 0xF000 to given adr.");
441 if(adr&(MINFLASHPAGE_SIZE-1)){
442 debugstr("Flash page address is not on a page boundary. Aborting.");
446 if(flash_word_size==0){
447 debugstr("Flash word size is wrong.");
452 //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
453 cc_write_xdata(0xF000+MAXFLASHPAGE_SIZE,
454 (u8*) flash_routine, sizeof(flash_routine));
455 //Patch routine's third byte with
456 //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
457 cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+2,
458 ((adr>>8)/flash_word_size)&0x7E);
459 //Patch routine to define FLASH_WORD_SIZE
460 if(flash_routine[25]!=0xde)
461 debugstr("Ugly patching code failing in chipcon.c");
462 cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+25,
465 //debugstr("Wrote flash routine.");
468 //MOV MEMCTR, (bank * 16) + 1;
473 debugstr("Loaded bank info.");
475 cc_set_pc(0xf000+MAXFLASHPAGE_SIZE);//execute code fragment
478 debugstr("Executing.");
481 while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
482 P1OUT^=1;//blink LED while flashing
486 debugstr("Done flashing.");
488 P1OUT&=~1;//clear LED
492 unsigned short cc_get_pc(){
493 cmddata[0]=CCCMD_GET_PC; //0x28
498 return cmddataword[0];
501 //! Set a hardware breakpoint.
502 void cc_set_hw_brkpnt(unsigned short adr){
503 debugstr("FIXME: This certainly won't work.");
513 cmddata[0]=CCCMD_HALT; //0x44
520 cmddata[0]=CCCMD_RESUME; //0x4C
527 //! Step an instruction
528 void cc_step_instr(){
529 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
535 //! Debug an instruction.
536 void cc_debug_instr(unsigned char len){
537 //Bottom two bits of command indicate length.
538 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
540 cctrans8(cmd); //Second command code
541 cccmd(len&0x3); //Command itself.
546 //! Debug an instruction, for local use.
547 unsigned char cc_debug(unsigned char len,
551 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
561 return cctrans8(0x00);
564 //! Fetch a byte of code memory.
565 unsigned char cc_peekcodebyte(unsigned long adr){
566 /** See page 9 of SWRA124 */
567 unsigned char bank=adr>>15,
573 //MOV MEMCTR, (bank*16)+1
574 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
576 cc_debug(3, 0x90, hb, lb);
580 cc_debug(2, 0xE4, 0, 0);
582 toret=cc_debug(3, 0x93, 0, 0);
584 //cc_debug(1, 0xA3, 0, 0);
590 //! Set a byte of data memory.
591 unsigned char cc_pokedatabyte(unsigned int adr,
598 cc_debug(3, 0x90, hb, lb);
600 cc_debug(2, 0x74, val, 0);
602 cc_debug(1, 0xF0, 0, 0);
606 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
607 for (n = 0; n < count; n++) {
608 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
609 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
610 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
615 //! Fetch a byte of data memory.
616 unsigned char cc_peekdatabyte(unsigned int adr){
622 cc_debug(3, 0x90, hb, lb);
624 //Must be 2, perhaps for clocking?
625 return cc_debug(3, 0xE0, 0, 0);
629 //! Fetch a byte of IRAM.
630 u8 cc_peekirambyte(u8 adr){
632 cc_debug(2, 0xE4, 0, 0);
634 return cc_debug(3, 0xE5, adr, 0);
637 //! Write a byte of IRAM.
638 u8 cc_pokeirambyte(u8 adr, u8 val){
640 cc_debug(2, 0xE4, 0, 0);
642 return cc_debug(3, 0x75, adr, val);
643 //return cc_debug(3, 0x75, val, adr);