2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates, the maximimum clock rates are defined on
24 page 4 of the spec. They vary, but are roughly 30MHz. Raising
25 this clock rate might allow for clock glitching, but the GoodFET
26 isn't sufficient fast for that. Perhaps a 200MHz ARM or an FPGA in
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 //#define CCDELAY(x) delay(x)
43 #define SETMOSI P5OUT|=MOSI
44 #define CLRMOSI P5OUT&=~MOSI
45 #define SETCLK P5OUT|=SCK
46 #define CLRCLK P5OUT&=~SCK
47 #define READMISO (P5IN&MISO?1:0)
49 #define CCWRITE P5DIR|=MOSI
50 #define CCREAD P5DIR&=~MISO
52 //! Set up the pins for CC mode. Does not init debugger.
59 //! Initialize the debugger
61 //Port output BUT NOT DIRECTION is set at start.
64 delay(30); //So the beginning is ready for glitching.
66 //Two positive debug clock pulses while !RST is low.
67 //Take RST low, pulse twice, then high.
75 P5OUT^=SCK; //Unnecessary.
82 //! Read and write a CC bit.
83 unsigned char cctrans8(unsigned char byte){
85 //This function came from the SPI Wikipedia article.
88 for (bit = 0; bit < 8; bit++) {
89 /* write MOSI on trailing edge of previous clock */
96 /* half a clock cycle before leading/rising edge */
100 /* half a clock cycle before trailing/falling edge */
103 /* read MISO on trailing edge */
111 //! Send a command from txbytes.
112 void cccmd(unsigned char len){
116 cctrans8(cmddata[i]);
119 //! Fetch a reply, usually 1 byte.
120 void ccread(unsigned char len){
124 cmddata[i]=cctrans8(0);
127 //! Handles a monitor command.
128 void cchandle(unsigned char app,
131 //Always init. Might help with buggy lines.
137 //CC_PEEK and CC_POKE will come later.
139 cmddata[0]=cc_peekirambyte(cmddata[0]);
143 cmddata[0]=cc_pokeirambyte(cmddata[0],cmddata[1]);
146 case READ: //Write a command and return 1-byte reply.
152 case WRITE: //Write a command with no reply.
156 case START://enter debugger
157 //ccsetup(); //interferes with glitching
161 case STOP://exit debugger
162 //Take RST low, then high.
179 cc_wr_config(cmddata[0]);
192 //no break, return status
197 case CC_SET_HW_BRKPNT:
198 cc_set_hw_brkpnt(cmddataword[0]);
217 case CC_STEP_REPLACE:
218 txdata(app,NOK,0);//TODO add me
221 cmddataword[0]=cc_get_chip_id();
227 case CC_READ_CODE_MEMORY:
228 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
231 case CC_READ_XDATA_MEMORY:
232 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
235 case CC_WRITE_XDATA_MEMORY:
236 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
240 cc_set_pc(cmddatalong[0]);
243 case CC_WRITE_FLASH_PAGE:
244 cc_write_flash_page(cmddatalong[0]);
247 case CC_WIPEFLASHBUFFER:
248 for(i=0xf000;i<0xf800;i++)
249 cc_pokedatabyte(i,0xFF);
252 case CC_MASS_ERASE_FLASH:
254 case CC_PROGRAM_FLASH:
255 debugstr("This Chipcon command is not yet implemented.");
256 txdata(app,NOK,0);//TODO implement me.
261 //! Set the Chipcon's Program Counter
262 void cc_set_pc(u32 adr){
263 cmddata[0]=0x02; //SetPC
264 cmddata[1]=((adr>>8)&0xff); //HIBYTE
265 cmddata[2]=adr&0xff; //LOBYTE
270 //! Erase all of a Chipcon's memory.
271 void cc_chip_erase(){
272 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
276 //! Write the configuration byte.
277 void cc_wr_config(unsigned char config){
278 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
288 //debugstr("Locking chip.");
289 cc_wr_config(1);//Select Info Flash
290 if(!(cc_rd_config()&1))
291 debugstr("Config forgotten!");
295 cc_pokedatabyte(0xf000+i,0);
296 cc_write_flash_page(0);
297 if(cc_peekcodebyte(0))
298 debugstr("Failed to clear info flash byte.");
302 debugstr("Stuck in info flash mode!");
305 //! Read the configuration byte.
306 unsigned char cc_rd_config(){
307 cmddata[0]=CCCMD_RD_CONFIG; //0x24
314 //! Read the status register
315 unsigned char cc_read_status(){
316 cmddata[0]=CCCMD_READ_STATUS; //0x3f
322 //! Read the CHIP ID bytes.
323 unsigned short cc_get_chip_id(){
324 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
329 //Find the flash word size.
334 flash_word_size=0x02;
335 //debugstr("2 bytes/flash word");
338 debugstr("Warning: Guessing flash word size.");
341 //debugstr("4 bytes/flash word");
342 flash_word_size=0x04;
347 return cmddataword[0];
350 //! Populates flash buffer in xdata.
351 void cc_write_flash_buffer(u8 *data, u16 len){
352 cc_write_xdata(0xf000, data, len);
354 //! Populates flash buffer in xdata.
355 void cc_write_xdata(u16 adr, u8 *data, u16 len){
357 for(i=0; i<len; i++){
358 cc_pokedatabyte(adr+i,
364 //32-bit words, 2KB pages
365 //0x20 0x00 for CC2430, CC1110
366 #define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
367 #define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
369 /** Ugh, this varies by chip.
373 //#define FLASHPAGE_SIZE 0x400
374 #define MAXFLASHPAGE_SIZE 0x800
375 #define MINFLASHPAGE_SIZE 0x400
378 //32 bit words on CC2430
379 //16 bit words on CC1110
380 //#define FLASH_WORD_SIZE 0x2
381 u8 flash_word_size = 0; //0x02;
384 /* Flash Write Timing
391 32 | 0x2A (Modula.si)
395 const u8 flash_routine[] = {
399 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
401 //0x75, 0xAB, 0x23, //Set FWT per clock
402 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
404 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
405 // ; Wait for flash erase to complete
406 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
407 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
409 /* End erase page. */
410 // ; Initialize the data pointer
411 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
413 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
414 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
415 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
418 0x7D, 0xde /*FLASH_WORD_SIZE*/, // writeLoop: MOV R5, #imm;
419 0xE0, // writeWordLoop: MOVX A, @DPTR;
421 0xF5, 0xAF, // MOV FWDATA, A;
422 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
423 // ; Wait for completion
424 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
425 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
426 0xDE, 0xF1, // DJNZ R6, writeLoop;
427 0xDF, 0xEF, // DJNZ R7, writeLoop;
428 // ; Done, fake a breakpoint
433 //! Copies flash buffer to flash.
434 void cc_write_flash_page(u32 adr){
435 //Assumes that page has already been written to XDATA 0xF000
436 //debugstr("Flashing 2kb at 0xF000 to given adr.");
438 if(adr&(MINFLASHPAGE_SIZE-1)){
439 debugstr("Flash page address is not on a page boundary. Aborting.");
443 if(flash_word_size==0){
444 debugstr("Flash word size is wrong.");
449 //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
450 cc_write_xdata(0xF000+MAXFLASHPAGE_SIZE,
451 (u8*) flash_routine, sizeof(flash_routine));
452 //Patch routine's third byte with
453 //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
454 cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+2,
455 ((adr>>8)/flash_word_size)&0x7E);
456 //Patch routine to define FLASH_WORD_SIZE
457 if(flash_routine[25]!=0xde)
458 debugstr("Ugly patching code failing in chipcon.c");
459 cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+25,
462 //debugstr("Wrote flash routine.");
465 //MOV MEMCTR, (bank * 16) + 1;
470 //debugstr("Loaded bank info.");
472 cc_set_pc(0xf000+MAXFLASHPAGE_SIZE);//execute code fragment
475 //debugstr("Executing.");
478 while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
479 P1OUT^=1;//blink LED while flashing
483 //debugstr("Done flashing.");
485 P1OUT&=~1;//clear LED
489 unsigned short cc_get_pc(){
490 cmddata[0]=CCCMD_GET_PC; //0x28
495 return cmddataword[0];
498 //! Set a hardware breakpoint.
499 void cc_set_hw_brkpnt(unsigned short adr){
500 debugstr("FIXME: This certainly won't work.");
510 cmddata[0]=CCCMD_HALT; //0x44
517 cmddata[0]=CCCMD_RESUME; //0x4C
524 //! Step an instruction
525 void cc_step_instr(){
526 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
532 //! Debug an instruction.
533 void cc_debug_instr(unsigned char len){
534 //Bottom two bits of command indicate length.
535 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
537 cctrans8(cmd); //Second command code
538 cccmd(len&0x3); //Command itself.
543 //! Debug an instruction, for local use.
544 unsigned char cc_debug(unsigned char len,
548 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
558 return cctrans8(0x00);
561 //! Fetch a byte of code memory.
562 unsigned char cc_peekcodebyte(unsigned long adr){
563 /** See page 9 of SWRA124 */
564 unsigned char bank=adr>>15,
570 //MOV MEMCTR, (bank*16)+1
571 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
573 cc_debug(3, 0x90, hb, lb);
577 cc_debug(2, 0xE4, 0, 0);
579 toret=cc_debug(3, 0x93, 0, 0);
581 //cc_debug(1, 0xA3, 0, 0);
587 //! Set a byte of data memory.
588 unsigned char cc_pokedatabyte(unsigned int adr,
595 cc_debug(3, 0x90, hb, lb);
597 cc_debug(2, 0x74, val, 0);
599 cc_debug(1, 0xF0, 0, 0);
603 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
604 for (n = 0; n < count; n++) {
605 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
606 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
607 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
612 //! Fetch a byte of data memory.
613 unsigned char cc_peekdatabyte(unsigned int adr){
619 cc_debug(3, 0x90, hb, lb);
621 //Must be 2, perhaps for clocking?
622 return cc_debug(3, 0xE0, 0, 0);
626 //! Fetch a byte of IRAM.
627 u8 cc_peekirambyte(u8 adr){
629 cc_debug(2, 0xE4, 0, 0);
631 return cc_debug(3, 0xE5, adr, 0);
634 //! Write a byte of IRAM.
635 u8 cc_pokeirambyte(u8 adr, u8 val){
637 cc_debug(2, 0xE4, 0, 0);
639 return cc_debug(3, 0x75, adr, val);
640 //return cc_debug(3, 0x75, val, adr);