+unsigned int jtag430_coreid(){
+ jtag_ir_shift8(IR_COREIP_ID);
+ return jtag_dr_shift16(0);
+}
+
+unsigned long jtag430_deviceid(){
+ jtag_ir_shift8(IR_DEVICE_ID);
+ return jtag_dr_shift(0);
+}
+
+//! Set the program counter.
+void jtag430x2_setpc(unsigned long pc){
+ unsigned short Mova;
+ unsigned short Pc_l;
+
+ Mova = 0x0080;
+ Mova += (unsigned short)((pc>>8) & 0x00000F00);
+ Pc_l = (unsigned short)((pc & 0xFFFF));
+
+ // Check Full-Emulation-State at the beginning
+ jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
+ if(jtag_dr_shift16(0) & 0x0301){
+ // MOVA #imm20, PC
+ CLRTCLK;
+ // take over bus control during clock LOW phase
+ jtag_ir_shift8(IR_DATA_16BIT);
+ SETTCLK;
+ jtag_dr_shift16(Mova);
+ jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
+ jtag_dr_shift16(0x1400);
+ jtag_ir_shift8(IR_DATA_16BIT);
+ CLRTCLK;
+ SETTCLK;
+ jtag_dr_shift16(Pc_l);
+ CLRTCLK;
+ SETTCLK;
+ jtag_dr_shift16(0x4303);
+ CLRTCLK;
+ jtag_ir_shift8(IR_ADDR_CAPTURE);
+ jtag_dr_shift(0x00000);
+ }
+}
+
+//! Read data from address
+unsigned int jtag430x2_readmem(unsigned int adr){
+ unsigned int toret;
+
+ //SETPC_430Xv2(StartAddr);
+ SETTCLK;
+ jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
+ jtag_dr_shift16(0x0501);
+ jtag_ir_shift8(IR_ADDR_CAPTURE);
+
+ jtag_ir_shift8(IR_DATA_QUICK);
+
+ SETTCLK;
+ CLRTCLK;
+ toret = jtag_dr_shift16(0);//read
+
+ jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
+
+ return toret;
+}
+