2 * IA-32 exception handlers
4 * Copyright (C) 2000 Asit K. Mallick <asit.k.mallick@intel.com>
5 * Copyright (C) 2001-2002 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * 06/16/00 A. Mallick added siginfo for most cases (close to IA32)
9 * 09/29/00 D. Mosberger added ia32_intercept()
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
16 #include <asm/ptrace.h>
19 ia32_intercept (struct pt_regs *regs, unsigned long isr)
21 switch ((isr >> 16) & 0xff) {
22 case 0: /* Instruction intercept fault */
23 case 4: /* Locked Data reference fault */
24 case 1: /* Gate intercept trap */
27 case 2: /* System flag trap */
28 if (((isr >> 14) & 0x3) >= 2) {
29 /* MOV SS, POP SS instructions */
30 ia64_psr(regs)->id = 1;
39 ia32_exception (struct pt_regs *regs, unsigned long isr)
41 struct siginfo siginfo;
43 /* initialize these fields to avoid leaking kernel bits to user space: */
48 switch ((isr >> 16) & 0xff) {
51 siginfo.si_signo = SIGTRAP;
53 siginfo.si_code = TRAP_TRACE;
55 siginfo.si_code = TRAP_BRANCH;
57 siginfo.si_code = TRAP_BRKPT;
61 siginfo.si_signo = SIGTRAP;
62 siginfo.si_code = TRAP_BRKPT;
65 case 0: /* Divide fault */
66 siginfo.si_signo = SIGFPE;
67 siginfo.si_code = FPE_INTDIV;
70 case 4: /* Overflow */
71 case 5: /* Bounds fault */
72 siginfo.si_signo = SIGFPE;
76 case 6: /* Invalid Op-code */
77 siginfo.si_signo = SIGILL;
78 siginfo.si_code = ILL_ILLOPN;
82 case 8: /* Double Fault */
83 case 9: /* Invalid TSS */
84 case 11: /* Segment not present */
85 case 12: /* Stack fault */
86 case 13: /* General Protection Fault */
87 siginfo.si_signo = SIGSEGV;
91 case 16: /* Pending FP error */
93 unsigned long fsr, fcr;
97 : "=r"(fsr), "=r"(fcr));
99 siginfo.si_signo = SIGFPE;
101 * (~cwd & swd) will mask out exceptions that are not set to unmasked
102 * status. 0x3f is the exception bits in these regs, 0x200 is the
103 * C1 reg you need in case of a stack fault, 0x040 is the stack
104 * fault bit. We should only be taking one exception at a time,
105 * so if this combination doesn't produce any single exception,
106 * then we have a bad program that isn't syncronizing its FPU usage
107 * and it will suffer the consequences since we won't be able to
108 * fully reproduce the context of the exception
110 siginfo.si_isr = isr;
111 siginfo.si_flags = __ISR_VALID;
112 switch(((~fcr) & (fsr & 0x3f)) | (fsr & 0x240)) {
117 case 0x001: /* Invalid Op */
118 case 0x040: /* Stack Fault */
119 case 0x240: /* Stack Fault | Direction */
120 siginfo.si_code = FPE_FLTINV;
122 case 0x002: /* Denormalize */
123 case 0x010: /* Underflow */
124 siginfo.si_code = FPE_FLTUND;
126 case 0x004: /* Zero Divide */
127 siginfo.si_code = FPE_FLTDIV;
129 case 0x008: /* Overflow */
130 siginfo.si_code = FPE_FLTOVF;
132 case 0x020: /* Precision */
133 siginfo.si_code = FPE_FLTRES;
140 case 17: /* Alignment check */
141 siginfo.si_signo = SIGSEGV;
142 siginfo.si_code = BUS_ADRALN;
145 case 19: /* SSE Numeric error */
146 siginfo.si_signo = SIGFPE;
153 force_sig_info(siginfo.si_signo, &siginfo, current);