2 * This file contains the code that gets mapped at the upper end of each task's text
3 * region. For now, it contains the signal trampoline code only.
5 * Copyright (C) 1999-2002 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
9 #include <asm/asmmacro.h>
10 #include <asm/offsets.h>
11 #include <asm/sigcontext.h>
12 #include <asm/system.h>
13 #include <asm/unistd.h>
16 .section .text.gate,"ax"
18 # define ARG0_OFF (16 + IA64_SIGFRAME_ARG0_OFFSET)
19 # define ARG1_OFF (16 + IA64_SIGFRAME_ARG1_OFFSET)
20 # define ARG2_OFF (16 + IA64_SIGFRAME_ARG2_OFFSET)
21 # define SIGHANDLER_OFF (16 + IA64_SIGFRAME_HANDLER_OFFSET)
22 # define SIGCONTEXT_OFF (16 + IA64_SIGFRAME_SIGCONTEXT_OFFSET)
24 # define FLAGS_OFF IA64_SIGCONTEXT_FLAGS_OFFSET
25 # define CFM_OFF IA64_SIGCONTEXT_CFM_OFFSET
26 # define FR6_OFF IA64_SIGCONTEXT_FR6_OFFSET
27 # define BSP_OFF IA64_SIGCONTEXT_AR_BSP_OFFSET
28 # define RNAT_OFF IA64_SIGCONTEXT_AR_RNAT_OFFSET
29 # define UNAT_OFF IA64_SIGCONTEXT_AR_UNAT_OFFSET
30 # define FPSR_OFF IA64_SIGCONTEXT_AR_FPSR_OFFSET
31 # define PR_OFF IA64_SIGCONTEXT_PR_OFFSET
32 # define RP_OFF IA64_SIGCONTEXT_IP_OFFSET
33 # define SP_OFF IA64_SIGCONTEXT_R12_OFFSET
34 # define RBS_BASE_OFF IA64_SIGCONTEXT_RBS_BASE_OFFSET
35 # define LOADRS_OFF IA64_SIGCONTEXT_LOADRS_OFFSET
39 * When we get here, the memory stack looks like this:
41 * +===============================+
43 * // struct sigframe //
45 * +-------------------------------+ <-- sp+16
46 * | 16 byte of scratch |
48 * +-------------------------------+ <-- sp
50 * The register stack looks _exactly_ the way it looked at the time the signal
51 * occurred. In other words, we're treading on a potential mine-field: each
52 * incoming general register may be a NaT value (including sp, in which case the
53 * process ends up dying with a SIGSEGV).
55 * The first thing need to do is a cover to get the registers onto the backing
56 * store. Once that is done, we invoke the signal handler which may modify some
57 * of the machine state. After returning from the signal handler, we return
58 * control to the previous context by executing a sigreturn system call. A signal
59 * handler may call the rt_sigreturn() function to directly return to a given
60 * sigcontext. However, the user-level sigreturn() needs to do much more than
61 * calling the rt_sigreturn() system call as it needs to unwind the stack to
62 * restore preserved registers that may have been saved on the signal handler's
66 #define SIGTRAMP_SAVES \
67 .unwabi @svr4, 's'; /* mark this as a sigtramp handler (saves scratch regs) */ \
68 .savesp ar.unat, UNAT_OFF+SIGCONTEXT_OFF; \
69 .savesp ar.fpsr, FPSR_OFF+SIGCONTEXT_OFF; \
70 .savesp pr, PR_OFF+SIGCONTEXT_OFF; \
71 .savesp rp, RP_OFF+SIGCONTEXT_OFF; \
72 .savesp ar.pfs, CFM_OFF+SIGCONTEXT_OFF; \
73 .vframesp SP_OFF+SIGCONTEXT_OFF
75 GLOBAL_ENTRY(ia64_sigtramp)
76 // describe the state that is active when we get here:
83 adds base0=SIGHANDLER_OFF,sp
84 adds base1=RBS_BASE_OFF+SIGCONTEXT_OFF,sp
85 br.call.sptk.many rp=1f
87 ld8 r17=[base0],(ARG0_OFF-SIGHANDLER_OFF) // get pointer to signal handler's plabel
88 ld8 r15=[base1] // get address of new RBS base (or NULL)
89 cover // push args in interrupted frame onto backing store
91 cmp.ne p1,p0=r15,r0 // do we need to switch rbs? (note: pr is saved by kernel)
92 mov.m r9=ar.bsp // fetch ar.bsp
93 .spillsp.p p1, ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
94 (p1) br.cond.spnt setup_rbs // yup -> (clobbers p8, r14-r16, and r18-r20)
96 alloc r8=ar.pfs,0,0,3,0
97 ld8 out0=[base0],16 // load arg0 (signum)
98 adds base1=(ARG1_OFF-(RBS_BASE_OFF+SIGCONTEXT_OFF)),base1
100 ld8 out1=[base1] // load arg1 (siginfop)
101 ld8 r10=[r17],8 // get signal handler entry point
103 ld8 out2=[base0] // load arg2 (sigcontextp)
104 ld8 gp=[r17] // get signal handler's global pointer
105 adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
107 .spillsp ar.bsp, BSP_OFF+SIGCONTEXT_OFF
108 st8 [base0]=r9 // save sc_ar_bsp
109 adds base0=(FR6_OFF+SIGCONTEXT_OFF),sp
110 adds base1=(FR6_OFF+16+SIGCONTEXT_OFF),sp
112 stf.spill [base0]=f6,32
113 stf.spill [base1]=f7,32
115 stf.spill [base0]=f8,32
116 stf.spill [base1]=f9,32
119 stf.spill [base0]=f10,32
120 stf.spill [base1]=f11,32
122 stf.spill [base0]=f12,32
123 stf.spill [base1]=f13,32
125 stf.spill [base0]=f14,32
126 stf.spill [base1]=f15,32
127 br.call.sptk.many rp=b6 // call the signal handler
128 .ret0: adds base0=(BSP_OFF+SIGCONTEXT_OFF),sp
130 ld8 r15=[base0],(CFM_OFF-BSP_OFF) // fetch sc_ar_bsp and advance to CFM_OFF
133 cmp.ne p1,p0=r14,r15 // do we need to restore the rbs?
134 (p1) br.cond.spnt restore_rbs // yup -> (clobbers r14-r18, f6 & f7)
136 back_from_restore_rbs:
137 adds base0=(FR6_OFF+SIGCONTEXT_OFF),sp
138 adds base1=(FR6_OFF+16+SIGCONTEXT_OFF),sp
140 ldf.fill f6=[base0],32
141 ldf.fill f7=[base1],32
143 ldf.fill f8=[base0],32
144 ldf.fill f9=[base1],32
146 ldf.fill f10=[base0],32
147 ldf.fill f11=[base1],32
149 ldf.fill f12=[base0],32
150 ldf.fill f13=[base1],32
152 ldf.fill f14=[base0],32
153 ldf.fill f15=[base1],32
154 mov r15=__NR_rt_sigreturn
155 .restore sp // pop .prologue
156 break __BREAK_SYSCALL
161 mov ar.rsc=0 // put RSE into enforced lazy mode
164 mov r19=ar.rnat // save RNaT before switching backing store area
165 adds r14=(RNAT_OFF+SIGCONTEXT_OFF),sp
168 mov ar.bspstore=r15 // switch over to new register backing store area
171 .spillsp ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
172 st8 [r14]=r19 // save sc_ar_rnat
174 mov.m r16=ar.bsp // sc_loadrs <- (new bsp - new bspstore) << 16
175 adds r14=(LOADRS_OFF+SIGCONTEXT_OFF),sp
181 mov ar.rsc=0xf // set RSE into eager mode, pl 3
185 st8 [r14]=r15 // save sc_loadrs
186 (p8) st8 [r18]=r19 // if bspstore points at RNaT slot, store RNaT there now
187 .restore sp // pop .prologue
188 br.cond.sptk back_from_setup_rbs
192 .spillsp ar.rnat, RNAT_OFF+SIGCONTEXT_OFF
196 // r14 = bsp1 (bsp at the time of return from signal handler)
197 // r15 = bsp0 (bsp at the time the signal occurred)
199 // Here, we need to calculate bspstore0, the value that ar.bspstore needs
200 // to be set to, based on bsp0 and the size of the dirty partition on
201 // the alternate stack (sc_loadrs >> 16). This can be done with the
202 // following algorithm:
204 // bspstore0 = rse_skip_regs(bsp0, -rse_num_regs(bsp1 - (loadrs >> 19), bsp1));
206 // This is what the code below does.
208 alloc r2=ar.pfs,0,0,0,0 // alloc null frame
209 adds r16=(LOADRS_OFF+SIGCONTEXT_OFF),sp
210 adds r18=(RNAT_OFF+SIGCONTEXT_OFF),sp
213 ld8 r16=[r18] // get new rnat
214 extr.u r18=r15,3,6 // r18 <- rse_slot_num(bsp0)
216 mov ar.rsc=r17 // put RSE into enforced lazy mode
219 sub r14=r14,r17 // r14 (bspstore1) <- bsp1 - (sc_loadrs >> 16)
220 shr.u r17=r17,3 // r17 <- (sc_loadrs >> 19)
222 loadrs // restore dirty partition
223 extr.u r14=r14,3,6 // r14 <- rse_slot_num(bspstore1)
225 add r14=r14,r17 // r14 <- rse_slot_num(bspstore1) + (sc_loadrs >> 19)
227 shr.u r14=r14,6 // r14 <- (rse_slot_num(bspstore1) + (sc_loadrs >> 19))/0x40
229 sub r14=r14,r17 // r14 <- -rse_num_regs(bspstore1, bsp1)
230 movl r17=0x8208208208208209
232 add r18=r18,r14 // r18 (delta) <- rse_slot_num(bsp0) - rse_num_regs(bspstore1,bsp1)
234 cmp.lt p7,p0=r14,r0 // p7 <- (r14 < 0)?
236 (p7) adds r18=-62,r18 // delta -= 62
249 sub r17=r17,r18 // r17 = delta/63
251 add r17=r14,r17 // r17 <- delta/63 - rse_num_regs(bspstore1, bsp1)
253 shladd r15=r17,3,r15 // r15 <- bsp0 + 8*(delta/63 - rse_num_regs(bspstore1, bsp1))
255 mov ar.bspstore=r15 // switch back to old register backing store area
257 mov ar.rnat=r16 // restore RNaT
258 mov ar.rsc=0xf // (will be restored later on from sc_ar_rsc)
259 // invala not necessary as that will happen when returning to user-mode
260 br.cond.sptk back_from_restore_rbs