import of upstream 2.4.34.4 from kernel.org
[linux-2.4.git] / arch / m68k / apollo / config.c
1 #include <linux/config.h>
2 #include <linux/types.h>
3 #include <linux/kernel.h>
4 #include <linux/mm.h>
5 #include <linux/tty.h>
6 #include <linux/console.h>
7 #include <linux/rtc.h>
8 #include <linux/vt_kern.h>
9
10 #include <asm/setup.h>
11 #include <asm/bootinfo.h>
12 #include <asm/system.h>
13 #include <asm/pgtable.h>
14 #include <asm/apollohw.h>
15 #include <asm/irq.h>
16 #include <asm/rtc.h>
17 #include <asm/machdep.h>
18
19 u_long sio01_physaddr;
20 u_long sio23_physaddr;
21 u_long rtc_physaddr;
22 u_long pica_physaddr;
23 u_long picb_physaddr;
24 u_long cpuctrl_physaddr;
25 u_long timer_physaddr;
26 u_long apollo_model;
27
28 extern void dn_sched_init(void (*handler)(int,void *,struct pt_regs *));
29 extern int dn_keyb_init(void);
30 extern int dn_dummy_kbdrate(struct kbd_repeat *);
31 extern void dn_init_IRQ(void);
32 extern int dn_request_irq(unsigned int irq, void (*handler)(int, void *, struct pt_regs *), unsigned long flags, const char *devname, void *dev_id);
33 extern void dn_free_irq(unsigned int irq, void *dev_id);
34 extern void dn_enable_irq(unsigned int);
35 extern void dn_disable_irq(unsigned int);
36 extern int dn_get_irq_list(char *);
37 extern unsigned long dn_gettimeoffset(void);
38 extern void dn_gettod(int *, int *, int *, int *, int *, int *);
39 extern int dn_dummy_hwclk(int, struct rtc_time *);
40 extern int dn_dummy_set_clock_mmss(unsigned long);
41 extern void dn_mksound(unsigned int count, unsigned int ticks);
42 extern void dn_dummy_reset(void);
43 extern void dn_dummy_waitbut(void);
44 extern struct fb_info *dn_fb_init(long *);
45 extern void dn_dummy_debug_init(void);
46 extern void dn_dummy_video_setup(char *,int *);
47 extern void dn_process_int(int irq, struct pt_regs *fp);
48 #ifdef CONFIG_HEARTBEAT
49 static void dn_heartbeat(int on);
50 #endif
51 static void dn_timer_int(int irq,void *, struct pt_regs *);
52 static void (*sched_timer_handler)(int, void *, struct pt_regs *)=NULL;
53 static void dn_get_model(char *model);
54 static const char *apollo_models[] = {
55         "DN3000 (Otter)",
56         "DN3010 (Otter)",
57         "DN3500 (Cougar II)",
58         "DN4000 (Mink)",
59         "DN4500 (Roadrunner)" };
60
61 int apollo_parse_bootinfo(const struct bi_record *record) {
62
63         int unknown = 0;
64         const unsigned long *data = record->data;
65
66         switch(record->tag) {
67                 case BI_APOLLO_MODEL: 
68                         apollo_model=*data;     
69                         break;
70
71                 default:
72                          unknown=1;
73         }
74         
75         return unknown;
76 }
77
78 void dn_setup_model(void) {
79         
80
81         printk("Apollo hardware found: ");
82         printk("[%s]\n", apollo_models[apollo_model - APOLLO_DN3000]);
83
84         switch(apollo_model) {
85                 case APOLLO_UNKNOWN:
86                         panic("Unknown apollo model");
87                         break;
88                 case APOLLO_DN3000:
89                 case APOLLO_DN3010:
90                         sio01_physaddr=SAU8_SIO01_PHYSADDR;     
91                         rtc_physaddr=SAU8_RTC_PHYSADDR; 
92                         pica_physaddr=SAU8_PICA;        
93                         picb_physaddr=SAU8_PICB;        
94                         cpuctrl_physaddr=SAU8_CPUCTRL;
95                         timer_physaddr=SAU8_TIMER;
96                         break;
97                 case APOLLO_DN4000:
98                         sio01_physaddr=SAU7_SIO01_PHYSADDR;     
99                         sio23_physaddr=SAU7_SIO23_PHYSADDR;     
100                         rtc_physaddr=SAU7_RTC_PHYSADDR; 
101                         pica_physaddr=SAU7_PICA;        
102                         picb_physaddr=SAU7_PICB;        
103                         cpuctrl_physaddr=SAU7_CPUCTRL;
104                         timer_physaddr=SAU7_TIMER;
105                         break;
106                 case APOLLO_DN4500:
107                         panic("Apollo model not yet supported");
108                         break;
109                 case APOLLO_DN3500:
110                         sio01_physaddr=SAU7_SIO01_PHYSADDR;     
111                         sio23_physaddr=SAU7_SIO23_PHYSADDR;     
112                         rtc_physaddr=SAU7_RTC_PHYSADDR; 
113                         pica_physaddr=SAU7_PICA;        
114                         picb_physaddr=SAU7_PICB;        
115                         cpuctrl_physaddr=SAU7_CPUCTRL;
116                         timer_physaddr=SAU7_TIMER;
117                         break;
118                 default:
119                         panic("Undefined apollo model");
120                         break;
121         }
122
123
124 }
125
126 int dn_serial_console_wait_key(struct console *co) {
127
128         while(!(sio01.srb_csrb & 1))
129                 barrier();
130         return sio01.rhrb_thrb;
131 }
132
133 void dn_serial_console_write (struct console *co, const char *str,unsigned int count)
134 {
135    while(count--) {
136         if (*str == '\n') { 
137         sio01.rhrb_thrb = (unsigned char)'\r';
138         while (!(sio01.srb_csrb & 0x4))
139                 ;
140         }
141     sio01.rhrb_thrb = (unsigned char)*str++;
142     while (!(sio01.srb_csrb & 0x4))
143             ;
144   }     
145 }
146  
147 void dn_serial_print (const char *str)
148 {
149     while (*str) {
150         if (*str == '\n') {
151             sio01.rhrb_thrb = (unsigned char)'\r';
152             while (!(sio01.srb_csrb & 0x4))
153                 ;
154         }
155         sio01.rhrb_thrb = (unsigned char)*str++;
156         while (!(sio01.srb_csrb & 0x4))
157             ;
158     }
159 }
160
161 void config_apollo(void) {
162
163         int i;
164
165         dn_setup_model();       
166
167         mach_sched_init=dn_sched_init; /* */
168 #ifdef CONFIG_VT
169         mach_keyb_init=dn_keyb_init;
170         mach_kbdrate=dn_dummy_kbdrate;
171         kd_mksound           = dn_mksound;
172 #endif
173         mach_init_IRQ=dn_init_IRQ;
174         mach_default_handler=NULL;
175         mach_request_irq     = dn_request_irq;
176         mach_free_irq        = dn_free_irq;
177         enable_irq      = dn_enable_irq;
178         disable_irq     = dn_disable_irq;
179         mach_get_irq_list    = dn_get_irq_list;
180         mach_gettimeoffset   = dn_gettimeoffset;
181         mach_gettod          = dn_gettod; /* */
182         mach_max_dma_address = 0xffffffff;
183         mach_hwclk           = dn_dummy_hwclk; /* */
184         mach_set_clock_mmss  = dn_dummy_set_clock_mmss; /* */
185         mach_process_int     = dn_process_int;
186         mach_reset           = dn_dummy_reset;  /* */
187 #ifdef CONFIG_DUMMY_CONSOLE
188         conswitchp           = &dummy_con;
189 #endif
190 #ifdef CONFIG_HEARTBEAT
191         mach_heartbeat = dn_heartbeat;
192 #endif
193         mach_get_model       = dn_get_model;
194
195         cpuctrl=0xaa00;
196
197         /* clear DMA translation table */
198         for(i=0;i<0x400;i++) 
199                 addr_xlat_map[i]=0;
200
201 }               
202
203 void dn_timer_int(int irq, void *dev_id, struct pt_regs *fp) {
204
205         volatile unsigned char x;
206
207         sched_timer_handler(irq,dev_id,fp);
208         
209         x=*(volatile unsigned char *)(timer+3);
210         x=*(volatile unsigned char *)(timer+5);
211
212 }
213
214 void dn_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) {
215
216         /* program timer 1 */           
217         *(volatile unsigned char *)(timer+3)=0x01;
218         *(volatile unsigned char *)(timer+1)=0x40;
219         *(volatile unsigned char *)(timer+5)=0x09;
220         *(volatile unsigned char *)(timer+7)=0xc4;
221
222         /* enable IRQ of PIC B */
223         *(volatile unsigned char *)(pica+1)&=(~8);
224
225 #if 0
226         printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
227         printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3));
228 #endif
229
230         sched_timer_handler=timer_routine;
231         request_irq(0,dn_timer_int,0,NULL,NULL);
232
233 }
234
235 unsigned long dn_gettimeoffset(void) {
236
237         return 0xdeadbeef;
238
239 }
240
241 void dn_gettod(int *yearp, int *monp, int *dayp,
242                int *hourp, int *minp, int *secp) {
243
244   *yearp=rtc->year;
245   *monp=rtc->month;
246   *dayp=rtc->day_of_month;
247   *hourp=rtc->hours;
248   *minp=rtc->minute;
249   *secp=rtc->second;
250
251 printk("gettod: %d %d %d %d %d %d\n",*yearp,*monp,*dayp,*hourp,*minp,*secp);
252
253 }
254
255 int dn_dummy_hwclk(int op, struct rtc_time *t) {
256
257
258   if(!op) { /* read */
259     t->tm_sec=rtc->second;
260     t->tm_min=rtc->minute;
261     t->tm_hour=rtc->hours;
262     t->tm_mday=rtc->day_of_month;
263     t->tm_wday=rtc->day_of_week;
264     t->tm_mon=rtc->month;
265     t->tm_year=rtc->year;
266   } else {
267     rtc->second=t->tm_sec;
268     rtc->minute=t->tm_min;
269     rtc->hours=t->tm_hour;
270     rtc->day_of_month=t->tm_mday;
271     if(t->tm_wday!=-1)
272       rtc->day_of_week=t->tm_wday;
273     rtc->month=t->tm_mon;
274     rtc->year=t->tm_year;
275   }
276
277   return 0;
278
279 }
280
281 int dn_dummy_set_clock_mmss(unsigned long nowtime) {
282
283   printk("set_clock_mmss\n");
284
285   return 0;
286
287 }
288
289 void dn_dummy_reset(void) {
290
291   dn_serial_print("The end !\n");
292
293   for(;;);
294
295 }
296         
297 void dn_dummy_waitbut(void) {
298
299   dn_serial_print("waitbut\n");
300
301 }
302
303 static void dn_get_model(char *model)
304 {
305     strcpy(model, "Apollo ");
306     if (apollo_model >= APOLLO_DN3000 && apollo_model <= APOLLO_DN4500)
307         strcat(model, apollo_models[apollo_model - APOLLO_DN3000]);
308 }
309
310 #ifdef CONFIG_HEARTBEAT
311 static int dn_cpuctrl=0xff00;
312
313 static void dn_heartbeat(int on) {
314
315         if(on) { 
316                 dn_cpuctrl&=~0x100;
317                 cpuctrl=dn_cpuctrl;
318         }
319         else {
320                 dn_cpuctrl&=~0x100;
321                 dn_cpuctrl|=0x100;
322                 cpuctrl=dn_cpuctrl;
323         }
324 }
325 #endif
326