2 * bios32.c - PCI BIOS functions for m68k systems.
4 * Written by Wout Klaren.
6 * Based on the DEC Alpha bios32.c by Dave Rusling and David Mosberger.
9 #include <linux/config.h>
10 #include <linux/init.h>
11 #include <linux/kernel.h>
14 # define DBG_DEVS(args) printk args
16 # define DBG_DEVS(args)
22 * PCI support for Linux/m68k. Currently only the Hades is supported.
24 * The support for PCI bridges in the DEC Alpha version has
25 * been removed in this version.
28 #include <linux/pci.h>
29 #include <linux/slab.h>
34 #include <asm/uaccess.h>
44 * Align VAL to ALIGN, which must be a power of two.
47 #define ALIGN(val,align) (((val) + ((align) - 1)) & ~((align) - 1))
49 #define MAX(val1, val2) (((val1) > (val2)) ? val1 : val2)
52 * Offsets relative to the I/O and memory base addresses from where resources
56 #define IO_ALLOC_OFFSET 0x00004000
57 #define MEM_ALLOC_OFFSET 0x04000000
60 * Declarations of hardware specific initialisation functions.
63 extern struct pci_bus_info *init_hades_pci(void);
66 * Bus info structure of the PCI bus. A pointer to this structure is
67 * put in the sysdata member of the pci_bus structure.
70 static struct pci_bus_info *bus_info;
72 static int pci_modify = 1; /* If set, layout the PCI bus ourself. */
73 static int skip_vga = 0; /* If set do not modify base addresses
75 static int disable_pci_burst = 0; /* If set do not allow PCI bursts. */
77 static unsigned int io_base;
78 static unsigned int mem_base;
80 struct pci_fixup pcibios_fixups[] =
86 * static void disable_dev(struct pci_dev *dev)
88 * Disable PCI device DEV so that it does not respond to I/O or memory
93 * dev - device to disable.
96 static void __init disable_dev(struct pci_dev *dev)
101 if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
102 (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
103 (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
107 pcibios_read_config_word(bus->number, dev->devfn, PCI_COMMAND, &cmd);
109 cmd &= (~PCI_COMMAND_IO & ~PCI_COMMAND_MEMORY & ~PCI_COMMAND_MASTER);
110 pcibios_write_config_word(bus->number, dev->devfn, PCI_COMMAND, cmd);
114 * static void layout_dev(struct pci_dev *dev)
116 * Layout memory and I/O for a device.
120 * device - device to layout memory and I/O for.
123 static void __init layout_dev(struct pci_dev *dev)
127 unsigned int base, mask, size, reg;
128 unsigned int alignto;
132 * Skip video cards if requested.
135 if (((dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA) ||
136 (dev->class >> 8 == PCI_CLASS_DISPLAY_VGA) ||
137 (dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)) && skip_vga)
141 pcibios_read_config_word(bus->number, dev->devfn, PCI_COMMAND, &cmd);
143 for (reg = PCI_BASE_ADDRESS_0, i = 0; reg <= PCI_BASE_ADDRESS_5; reg += 4, i++)
146 * Figure out how much space and of what type this
150 pcibios_write_config_dword(bus->number, dev->devfn, reg,
152 pcibios_read_config_dword(bus->number, dev->devfn, reg, &base);
156 /* this base-address register is unused */
157 dev->resource[i].start = 0;
158 dev->resource[i].end = 0;
159 dev->resource[i].flags = 0;
164 * We've read the base address register back after
165 * writing all ones and so now we must decode it.
168 if (base & PCI_BASE_ADDRESS_SPACE_IO)
171 * I/O space base address register.
174 cmd |= PCI_COMMAND_IO;
176 base &= PCI_BASE_ADDRESS_IO_MASK;
177 mask = (~base << 1) | 0x1;
178 size = (mask & base) & 0xffffffff;
181 * Align to multiple of size of minimum base.
184 alignto = MAX(0x040, size) ;
185 base = ALIGN(io_base, alignto);
186 io_base = base + size;
187 pcibios_write_config_dword(bus->number, dev->devfn,
188 reg, base | PCI_BASE_ADDRESS_SPACE_IO);
190 dev->resource[i].start = base;
191 dev->resource[i].end = dev->resource[i].start + size - 1;
192 dev->resource[i].flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
194 DBG_DEVS(("layout_dev: IO address: %lX\n", base));
201 * Memory space base address register.
204 cmd |= PCI_COMMAND_MEMORY;
205 type = base & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
206 base &= PCI_BASE_ADDRESS_MEM_MASK;
207 mask = (~base << 1) | 0x1;
208 size = (mask & base) & 0xffffffff;
211 case PCI_BASE_ADDRESS_MEM_TYPE_32:
212 case PCI_BASE_ADDRESS_MEM_TYPE_64:
215 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
216 printk("bios32 WARNING: slot %d, function %d "
217 "requests memory below 1MB---don't "
218 "know how to do that.\n",
219 PCI_SLOT(dev->devfn),
220 PCI_FUNC(dev->devfn));
225 * Align to multiple of size of minimum base.
228 alignto = MAX(0x1000, size) ;
229 base = ALIGN(mem_base, alignto);
230 mem_base = base + size;
231 pcibios_write_config_dword(bus->number, dev->devfn,
234 dev->resource[i].start = base;
235 dev->resource[i].end = dev->resource[i].start + size - 1;
236 dev->resource[i].flags = IORESOURCE_MEM;
238 if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
241 * 64-bit address, set the highest 32 bits
246 pcibios_write_config_dword(bus->number, dev->devfn,
250 dev->resource[i].start = 0;
251 dev->resource[i].end = 0;
252 dev->resource[i].flags = 0;
261 if (dev->class >> 8 == PCI_CLASS_NOT_DEFINED ||
262 dev->class >> 8 == PCI_CLASS_NOT_DEFINED_VGA ||
263 dev->class >> 8 == PCI_CLASS_DISPLAY_VGA ||
264 dev->class >> 8 == PCI_CLASS_DISPLAY_XGA)
267 * All of these (may) have I/O scattered all around
268 * and may not use i/o-base address registers at all.
269 * So we just have to always enable I/O to these
272 cmd |= PCI_COMMAND_IO;
275 pcibios_write_config_word(bus->number, dev->devfn, PCI_COMMAND,
276 cmd | PCI_COMMAND_MASTER);
278 pcibios_write_config_byte(bus->number, dev->devfn, PCI_LATENCY_TIMER,
279 (disable_pci_burst) ? 0 : 32);
281 if (bus_info != NULL)
282 bus_info->conf_device(bus->number, dev->devfn); /* Machine dependent configuration. */
284 DBG_DEVS(("layout_dev: bus %d slot 0x%x VID 0x%x DID 0x%x class 0x%x\n",
285 bus->number, PCI_SLOT(dev->devfn), dev->vendor, dev->device, dev->class));
289 * static void layout_bus(struct pci_bus *bus)
291 * Layout memory and I/O for all devices on the given bus.
298 static void __init layout_bus(struct pci_bus *bus)
300 unsigned int bio, bmem;
303 DBG_DEVS(("layout_bus: starting bus %d\n", bus->number));
305 if (!bus->devices && !bus->children)
309 * Align the current bases on appropriate boundaries (4K for
310 * IO and 1MB for memory).
313 bio = io_base = ALIGN(io_base, 4*KB);
314 bmem = mem_base = ALIGN(mem_base, 1*MB);
317 * PCI devices might have been setup by a PCI BIOS emulation
318 * running under TOS. In these cases there is a
319 * window during which two devices may have an overlapping
320 * address range. To avoid this causing trouble, we first
321 * turn off the I/O and memory address decoders for all PCI
322 * devices. They'll be re-enabled only once all address
323 * decoders are programmed consistently.
326 DBG_DEVS(("layout_bus: disable_dev for bus %d\n", bus->number));
328 for (dev = bus->devices; dev; dev = dev->sibling)
330 if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
331 (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
336 * Allocate space to each device:
339 DBG_DEVS(("layout_bus: starting bus %d devices\n", bus->number));
341 for (dev = bus->devices; dev; dev = dev->sibling)
343 if ((dev->class >> 16 != PCI_BASE_CLASS_BRIDGE) ||
344 (dev->class >> 8 == PCI_CLASS_BRIDGE_PCMCIA))
348 DBG_DEVS(("layout_bus: bus %d finished\n", bus->number));
352 * static void pcibios_fixup(void)
354 * Layout memory and I/O of all devices on the PCI bus if 'pci_modify' is
355 * true. This might be necessary because not every m68k machine with a PCI
356 * bus has a PCI BIOS. This function should be called right after
357 * pci_scan_bus() in pcibios_init().
360 static void __init pcibios_fixup(void)
365 * Set base addresses for allocation of I/O and memory space.
368 io_base = bus_info->io_space.start + IO_ALLOC_OFFSET;
369 mem_base = bus_info->mem_space.start + MEM_ALLOC_OFFSET;
372 * Scan the tree, allocating PCI memory and I/O space.
375 layout_bus(pci_bus_b(pci_root.next));
379 * Fix interrupt assignments, etc.
382 bus_info->fixup(pci_modify);
386 * static void pcibios_claim_resources(struct pci_bus *bus)
388 * Claim all resources that are assigned to devices on the given bus.
395 static void __init pcibios_claim_resources(struct pci_bus *bus)
402 for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
404 for (i = 0; i < PCI_NUM_RESOURCES; i++)
406 struct resource *r = &dev->resource[i];
408 struct pci_bus_info *bus_info = (struct pci_bus_info *) dev->sysdata;
410 if ((r->start == 0) || (r->parent != NULL))
413 if (r->flags & IORESOURCE_IO)
414 pr = &bus_info->io_space;
416 pr = &bus_info->mem_space;
418 if (r->flags & IORESOURCE_IO)
419 pr = &ioport_resource;
421 pr = &iomem_resource;
423 if (request_resource(pr, r) < 0)
425 printk(KERN_ERR "PCI: Address space collision on region %d of device %s\n", i, dev->name);
431 pcibios_claim_resources(bus->children);
438 * int pcibios_assign_resource(struct pci_dev *dev, int i)
440 * Assign a new address to a PCI resource.
447 * Result: 0 if successful.
450 int __init pcibios_assign_resource(struct pci_dev *dev, int i)
452 struct resource *r = &dev->resource[i];
453 struct resource *pr = pci_find_parent_resource(dev, r);
454 unsigned long size = r->end + 1;
459 if (r->flags & IORESOURCE_IO)
464 if (allocate_resource(pr, r, size, bus_info->io_space.start +
465 IO_ALLOC_OFFSET, bus_info->io_space.end, 1024))
470 if (allocate_resource(pr, r, size, bus_info->mem_space.start +
471 MEM_ALLOC_OFFSET, bus_info->mem_space.end, size))
476 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + 4 * i, r->start);
481 void __init pcibios_fixup_bus(struct pci_bus *bus)
486 sysdata = (bus->parent) ? bus->parent->sysdata : bus->sysdata;
488 for (dev = bus->devices; (dev != NULL); dev = dev->sibling)
489 dev->sysdata = sysdata;
492 void __init pcibios_init(void)
494 printk("Linux/m68k PCI BIOS32 revision %x.%02x\n", MAJOR_REV, MINOR_REV);
499 bus_info = init_hades_pci();
501 if (bus_info != NULL)
503 printk("PCI: Probing PCI hardware\n");
504 pci_scan_bus(0, bus_info->m68k_pci_ops, bus_info);
506 pcibios_claim_resources(pci_root);
509 printk("PCI: No PCI bus detected\n");
512 char * __init pcibios_setup(char *str)
514 if (!strcmp(str, "nomodify"))
519 else if (!strcmp(str, "skipvga"))
524 else if (!strcmp(str, "noburst"))
526 disable_pci_burst = 1;
532 #endif /* CONFIG_PCI */