2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/errno.h>
14 #include <linux/bootmem.h>
15 #include <linux/spinlock.h>
16 #include <asm/mipsregs.h>
19 #include <asm/uaccess.h>
21 #include <asm/jazzdma.h>
22 #include <asm/pgtable.h>
25 * Set this to one to enable additional vdma debug code.
27 #define CONF_DEBUG_VDMA 0
29 static spinlock_t jazz_dma_lock = SPIN_LOCK_UNLOCKED;
31 static unsigned long vdma_pagetable_start;
36 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
38 static int debuglvl = 3;
41 * Initialize the pagetable with a one-to-one mapping of
42 * the first 16 Mbytes of main memory and declare all
43 * entries to be unused. Using this method will at least
44 * allow some early device driver operations to work.
46 static inline void vdma_pgtbl_init(void)
48 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
49 unsigned long paddr = 0;
52 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
53 pgtbl[i].frame = paddr;
54 pgtbl[i].owner = VDMA_PAGE_EMPTY;
55 paddr += VDMA_PAGESIZE;
60 * Initialize the Jazz R4030 dma controller
62 void __init vdma_init(void)
65 * Allocate 32k of memory for DMA page tables. This needs to be page
66 * aligned and should be uncached to avoid cache flushing after every
69 vdma_pagetable_start = alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
70 if (!vdma_pagetable_start)
72 dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
73 vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
76 * Clear the R4030 translation table
80 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
81 PHYSADDR(vdma_pagetable_start));
82 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
83 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
85 printk("VDMA: R4030 DMA pagetables initialized.\n");
89 * Allocate DMA pagetables using a simple first-fit algorithm
91 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
93 VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
94 int first, last, pages, frame, i;
95 unsigned long laddr, flags;
99 if (paddr > 0x1fffffff) {
101 printk("vdma_alloc: Invalid physical address: %08lx\n",
103 return VDMA_ERROR; /* invalid physical address */
105 if (size > 0x400000 || size == 0) {
107 printk("vdma_alloc: Invalid size: %08lx\n", size);
108 return VDMA_ERROR; /* invalid physical address */
111 spin_lock_irqsave(&jazz_dma_lock, flags);
116 pages = (size + 4095) >> 12; /* no. of pages to allocate */
119 while (entry[first].owner != VDMA_PAGE_EMPTY &&
120 first < VDMA_PGTBL_ENTRIES) first++;
121 if (first + pages > VDMA_PGTBL_ENTRIES) {
123 spin_unlock_irqrestore(&jazz_dma_lock, flags);
128 while (entry[last].owner == VDMA_PAGE_EMPTY
129 && last - first < pages)
132 if (last - first == pages)
137 * Mark pages as allocated
139 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
140 frame = paddr & ~(VDMA_PAGESIZE - 1);
142 for (i = first; i < last; i++) {
143 entry[i].frame = frame;
144 entry[i].owner = laddr;
145 frame += VDMA_PAGESIZE;
149 * Update translation table and return logical start address
151 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
154 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
157 if (vdma_debug > 2) {
159 for (i = first; i < last; i++)
160 printk("%08x ", i << 12);
162 for (i = first; i < last; i++)
163 printk("%08x ", entry[i].frame);
165 for (i = first; i < last; i++)
166 printk("%08x ", entry[i].owner);
170 spin_unlock_irqrestore(&jazz_dma_lock, flags);
176 * Free previously allocated dma translation pages
177 * Note that this does NOT change the translation table,
178 * it just marks the free'd pages as unused!
180 int vdma_free(unsigned long laddr)
182 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
187 if (pgtbl[i].owner != laddr) {
189 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
194 while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
195 pgtbl[i].owner = VDMA_PAGE_EMPTY;
200 printk("vdma_free: freed %ld pages starting from %08lx\n",
201 i - (laddr >> 12), laddr);
207 * Map certain page(s) to another physical address.
208 * Caller must have allocated the page(s) before.
210 int vdma_remap(unsigned long laddr, unsigned long paddr,
213 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
214 int first, pages, npages;
216 if (laddr > 0xffffff) {
218 printk("vdma_map: Invalid logical address: %08lx\n",
220 return -EINVAL; /* invalid logical address */
222 if (paddr > 0x1fffffff) {
224 printk("vdma_map: Invalid physical address: %08lx\n",
226 return -EINVAL; /* invalid physical address */
229 npages = pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
232 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
233 if (first + pages > VDMA_PGTBL_ENTRIES) {
235 printk("vdma_alloc: Invalid size: %08lx\n", size);
239 paddr &= ~(VDMA_PAGESIZE - 1);
240 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
241 if (pgtbl[first].owner != laddr) {
243 printk("Trying to remap other's pages.\n");
244 return -EPERM; /* not owner */
246 pgtbl[first].frame = paddr;
247 paddr += VDMA_PAGESIZE;
253 * Update translation table
255 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
257 if (vdma_debug > 2) {
259 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
262 for (i = first; i < first + pages; i++)
263 printk("%08x ", i << 12);
265 for (i = first; i < first + pages; i++)
266 printk("%08x ", pgtbl[i].frame);
268 for (i = first; i < first + pages; i++)
269 printk("%08x ", pgtbl[i].owner);
277 * Translate a physical address to a logical address.
278 * This will return the logical address of the first
281 unsigned long vdma_phys2log(unsigned long paddr)
283 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
286 frame = paddr & ~(VDMA_PAGESIZE - 1);
288 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
289 if (pgtbl[i].frame == frame)
293 if (i == VDMA_PGTBL_ENTRIES)
296 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
300 * Translate a logical DMA address to a physical address
302 unsigned long vdma_log2phys(unsigned long laddr)
304 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
306 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
310 * Print DMA statistics
312 void vdma_stats(void)
316 printk("vdma_stats: CONFIG: %08x\n",
317 r4030_read_reg32(JAZZ_R4030_CONFIG));
318 printk("R4030 translation table base: %08x\n",
319 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
320 printk("R4030 translation table limit: %08x\n",
321 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
322 printk("vdma_stats: INV_ADDR: %08x\n",
323 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
324 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
325 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
326 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
327 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
328 printk("vdma_stats: IRQ_SOURCE: %08x\n",
329 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
330 printk("vdma_stats: I386_ERROR: %08x\n",
331 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
332 printk("vdma_chnl_modes: ");
333 for (i = 0; i < 8; i++)
335 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
338 printk("vdma_chnl_enables: ");
339 for (i = 0; i < 8; i++)
340 printk("%04x ", r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
346 * DMA transfer functions
350 * Enable a DMA channel. Also clear any error conditions.
352 void vdma_enable(int channel)
357 printk("vdma_enable: channel %d\n", channel);
360 * Check error conditions first
362 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
364 printk("VDMA: Channel %d: Address error!\n", channel);
366 printk("VDMA: Channel %d: Memory error!\n", channel);
369 * Clear all interrupt flags
371 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
372 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
373 (channel << 5)) | R4030_TC_INTR
374 | R4030_MEM_INTR | R4030_ADDR_INTR);
377 * Enable the desired channel
379 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
380 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
386 * Disable a DMA channel
388 void vdma_disable(int channel)
391 int status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
394 printk("vdma_disable: channel %d\n", channel);
395 printk("VDMA: channel %d status: %04x (%s) mode: "
396 "%02x addr: %06x count: %06x\n",
398 ((status & 0x600) ? "ERROR" : "OK"),
399 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
401 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
403 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
407 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
408 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
413 * After disabling a DMA channel a remote bus register should be
414 * read to ensure that the current DMA acknowledge cycle is completed.
416 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
420 * Set DMA mode. This function accepts the mode values used
421 * to set a PC-style DMA controller. For the SCSI and FDC
422 * channels, we also set the default modes each time we're
424 * NOTE: The FAST and BURST dma modes are supported by the
425 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
428 void vdma_set_mode(int channel, int mode)
431 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
435 case JAZZ_SCSI_DMA: /* scsi */
436 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
437 /* R4030_MODE_FAST | */
438 /* R4030_MODE_BURST | */
440 R4030_MODE_WIDTH_16 |
441 R4030_MODE_ATIME_80);
444 case JAZZ_FLOPPY_DMA: /* floppy */
445 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
446 /* R4030_MODE_FAST | */
447 /* R4030_MODE_BURST | */
450 R4030_MODE_ATIME_120);
453 case JAZZ_AUDIOL_DMA:
454 case JAZZ_AUDIOR_DMA:
455 printk("VDMA: Audio DMA not supported yet.\n");
460 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
466 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
467 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
473 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
474 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
481 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
487 * Set Transfer Address
489 void vdma_set_addr(int channel, long addr)
492 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
495 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
501 void vdma_set_count(int channel, int count)
504 printk("vdma_set_count: channel %d, count %08x\n", channel,
507 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
513 int vdma_get_residue(int channel)
518 r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
521 printk("vdma_get_residual: channel %d: residual=%d\n",
528 * Get DMA channel enable register
530 int vdma_get_enable(int channel)
534 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
537 printk("vdma_get_enable: channel %d: enable=%d\n", channel,