2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Code to handle x86 style IRQs plus some generic interrupt stuff.
8 * Copyright (C) 1992 Linus Torvalds
9 * Copyright (C) 1994 - 2000 Ralf Baechle
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/spinlock.h>
18 #include <asm/i8259.h>
21 void enable_8259A_irq(unsigned int irq);
22 void disable_8259A_irq(unsigned int irq);
25 * This is the 'legacy' 8259A Programmable Interrupt Controller,
26 * present in the majority of PC/AT boxes.
27 * plus some generic x86 specific things if generic specifics makes
29 * this file should become arch/i386/kernel/irq.c when the old irq.c
30 * moves to arch independent land
33 static spinlock_t i8259A_lock = SPIN_LOCK_UNLOCKED;
35 static void end_8259A_irq (unsigned int irq)
37 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
38 enable_8259A_irq(irq);
41 #define shutdown_8259A_irq disable_8259A_irq
43 void mask_and_ack_8259A(unsigned int);
45 static unsigned int startup_8259A_irq(unsigned int irq)
47 enable_8259A_irq(irq);
49 return 0; /* never anything pending */
52 static struct hw_interrupt_type i8259A_irq_type = {
64 * 8259A PIC functions to handle ISA devices:
68 * This contains the irq mask for both 8259A irq controllers,
70 static unsigned int cached_irq_mask = 0xffff;
72 #define cached_21 (cached_irq_mask)
73 #define cached_A1 (cached_irq_mask >> 8)
75 void disable_8259A_irq(unsigned int irq)
77 unsigned int mask = 1 << irq;
80 spin_lock_irqsave(&i8259A_lock, flags);
81 cached_irq_mask |= mask;
86 spin_unlock_irqrestore(&i8259A_lock, flags);
89 void enable_8259A_irq(unsigned int irq)
91 unsigned int mask = ~(1 << irq);
94 spin_lock_irqsave(&i8259A_lock, flags);
95 cached_irq_mask &= mask;
100 spin_unlock_irqrestore(&i8259A_lock, flags);
103 int i8259A_irq_pending(unsigned int irq)
105 unsigned int mask = 1 << irq;
109 spin_lock_irqsave(&i8259A_lock, flags);
111 ret = inb(0x20) & mask;
113 ret = inb(0xA0) & (mask >> 8);
114 spin_unlock_irqrestore(&i8259A_lock, flags);
119 void make_8259A_irq(unsigned int irq)
121 disable_irq_nosync(irq);
122 irq_desc[irq].handler = &i8259A_irq_type;
127 * This function assumes to be called rarely. Switching between
128 * 8259A registers is slow.
129 * This has to be protected by the irq controller spinlock
130 * before being called.
132 static inline int i8259A_irq_real(unsigned int irq)
135 int irqmask = 1 << irq;
138 outb(0x0B,0x20); /* ISR register */
139 value = inb(0x20) & irqmask;
140 outb(0x0A,0x20); /* back to the IRR register */
143 outb(0x0B,0xA0); /* ISR register */
144 value = inb(0xA0) & (irqmask >> 8);
145 outb(0x0A,0xA0); /* back to the IRR register */
150 * Careful! The 8259A is a fragile beast, it pretty
151 * much _has_ to be done exactly like this (mask it
152 * first, _then_ send the EOI, and the order of EOI
153 * to the two 8259s is important!
155 void mask_and_ack_8259A(unsigned int irq)
157 unsigned int irqmask = 1 << irq;
160 spin_lock_irqsave(&i8259A_lock, flags);
162 * Lightweight spurious IRQ detection. We do not want to overdo
163 * spurious IRQ handling - it's usually a sign of hardware problems, so
164 * we only do the checks we can do without slowing down good hardware
167 * Note that IRQ7 and IRQ15 (the two spurious IRQs usually resulting
168 * rom the 8259A-1|2 PICs) occur even if the IRQ is masked in the 8259A.
169 * Thus we can check spurious 8259A IRQs without doing the quite slow
170 * i8259A_irq_real() call for every IRQ. This does not cover 100% of
171 * spurious interrupts, but should be enough to warn the user that
172 * there is something bad going on ...
174 if (cached_irq_mask & irqmask)
175 goto spurious_8259A_irq;
176 cached_irq_mask |= irqmask;
180 inb(0xA1); /* DUMMY - (do we need this?) */
181 outb(cached_A1,0xA1);
182 outb(0x60+(irq&7),0xA0);/* 'Specific EOI' to slave */
183 outb(0x62,0x20); /* 'Specific EOI' to master-IRQ2 */
185 inb(0x21); /* DUMMY - (do we need this?) */
186 outb(cached_21,0x21);
187 outb(0x60+irq,0x20); /* 'Specific EOI' to master */
189 spin_unlock_irqrestore(&i8259A_lock, flags);
194 * this is the slow path - should happen rarely.
196 if (i8259A_irq_real(irq))
198 * oops, the IRQ _is_ in service according to the
199 * 8259A - not spurious, go handle it.
201 goto handle_real_irq;
204 static int spurious_irq_mask = 0;
206 * At this point we can be sure the IRQ is spurious,
207 * lets ACK and report it. [once per IRQ]
209 if (!(spurious_irq_mask & irqmask)) {
210 printk("spurious 8259A interrupt: IRQ%d.\n", irq);
211 spurious_irq_mask |= irqmask;
213 atomic_inc(&irq_err_count);
215 * Theoretically we do not have to handle this IRQ,
216 * but in Linux this does not cause problems and is
219 goto handle_real_irq;
223 void __init init_8259A(int auto_eoi)
227 spin_lock_irqsave(&i8259A_lock, flags);
229 outb(0xff, 0x21); /* mask all of 8259A-1 */
230 outb(0xff, 0xA1); /* mask all of 8259A-2 */
233 * outb_p - this has to work on a wide range of PC hardware.
235 outb_p(0x11, 0x20); /* ICW1: select 8259A-1 init */
236 outb_p(0x00, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x00-0x07 */
237 outb_p(0x04, 0x21); /* 8259A-1 (the master) has a slave on IR2 */
239 outb_p(0x03, 0x21); /* master does Auto EOI */
241 outb_p(0x01, 0x21); /* master expects normal EOI */
243 outb_p(0x11, 0xA0); /* ICW1: select 8259A-2 init */
244 outb_p(0x08, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x08-0x0f */
245 outb_p(0x02, 0xA1); /* 8259A-2 is a slave on master's IR2 */
246 outb_p(0x01, 0xA1); /* (slave's support for AEOI in flat mode
247 is to be investigated) */
251 * in AEOI mode we just have to mask the interrupt
254 i8259A_irq_type.ack = disable_8259A_irq;
256 i8259A_irq_type.ack = mask_and_ack_8259A;
258 udelay(100); /* wait for 8259A to initialize */
260 outb(cached_21, 0x21); /* restore master IRQ mask */
261 outb(cached_A1, 0xA1); /* restore slave IRQ mask */
263 spin_unlock_irqrestore(&i8259A_lock, flags);
266 asmlinkage void i8259_do_irq(int irq, struct pt_regs regs)
268 panic("i8259_do_irq: I want to be implemented");
272 * IRQ2 is cascade interrupt to second interrupt controller
274 static struct irqaction irq2 = {
275 no_action, 0, 0, "cascade", NULL, NULL
278 static struct resource pic1_io_resource = {
279 "pic1", 0x20, 0x3f, IORESOURCE_BUSY
282 static struct resource pic2_io_resource = {
283 "pic2", 0xa0, 0xbf, IORESOURCE_BUSY
287 * On systems with i8259-style interrupt controllers we assume for
288 * driver compatibility reasons interrupts 0 - 15 to be the i8295
289 * interrupts even if the hardware uses a different interrupt numbering.
291 void __init init_i8259_irqs (void)
295 request_resource(&ioport_resource, &pic1_io_resource);
296 request_resource(&ioport_resource, &pic2_io_resource);
300 for (i = 0; i < 16; i++) {
301 irq_desc[i].status = IRQ_DISABLED;
302 irq_desc[i].action = 0;
303 irq_desc[i].depth = 1;
304 irq_desc[i].handler = &i8259A_irq_type;