2 * BK Id: SCCS/s.enet.c 1.24 01/19/02 03:07:14 dan
5 * Ethernet driver for Motorola MPC8xx.
6 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
8 * I copied the basic skeleton from the lance driver, because I did not
9 * know how to write the Linux driver, but I did know how the LANCE worked.
11 * This version of the driver is somewhat selectable for the different
12 * processor/board combinations. It works for the boards I know about
13 * now, and should be easily modified to include others. Some of the
14 * configuration information is contained in <asm/commproc.h> and the
17 * Buffer descriptors are kept in the CPM dual port RAM, and the frame
18 * buffers are in the host memory.
20 * Right now, I am very watseful with the buffers. I allocate memory
21 * pages and then divide them into 2K frame buffers. This way I know I
22 * have buffers large enough to hold one frame within one buffer descriptor.
23 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
24 * will be much more memory efficient and will easily handle lots of
28 #include <linux/config.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/string.h>
32 #include <linux/ptrace.h>
33 #include <linux/errno.h>
34 #include <linux/ioport.h>
35 #include <linux/slab.h>
36 #include <linux/interrupt.h>
37 #include <linux/pci.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/netdevice.h>
41 #include <linux/etherdevice.h>
42 #include <linux/skbuff.h>
43 #include <linux/spinlock.h>
45 #include <asm/8xx_immap.h>
46 #include <asm/pgtable.h>
47 #include <asm/mpc8xx.h>
48 #include <asm/bitops.h>
49 #include <asm/uaccess.h>
50 #include <asm/commproc.h>
55 * The MPC8xx CPM performs the Ethernet processing on SCC1. It can use
56 * an aribtrary number of buffers on byte boundaries, but must have at
57 * least two receive buffers to prevent constant overrun conditions.
59 * The buffer descriptors are allocated from the CPM dual port memory
60 * with the data buffers allocated from host memory, just like all other
61 * serial communication protocols. The host memory buffers are allocated
62 * from the free page pool, and then divided into smaller receive and
63 * transmit buffers. The size of the buffers should be a power of two,
64 * since that nicely divides the page. This creates a ring buffer
65 * structure similar to the LANCE and other controllers.
67 * Like the LANCE driver:
68 * The driver runs as two independent, single-threaded flows of control. One
69 * is the send-packet routine, which enforces single-threaded use by the
70 * cep->tx_busy flag. The other thread is the interrupt handler, which is
71 * single threaded by the hardware and other software.
73 * The send packet thread has partial control over the Tx ring and the
74 * 'cep->tx_busy' flag. It sets the tx_busy flag whenever it's queuing a Tx
75 * packet. If the next queue slot is empty, it clears the tx_busy flag when
76 * finished otherwise it sets the 'lp->tx_full' flag.
78 * The MBX has a control register external to the MPC8xx that has some
79 * control of the Ethernet interface. Information is in the manual for
82 * The RPX boards have an external control/status register. Consult the
83 * programming documents for details unique to your board.
85 * For the TQM8xx(L) modules, there is no control register interface.
86 * All functions are directly controlled using I/O pins. See <asm/commproc.h>.
89 /* The transmitter timeout
91 #define TX_TIMEOUT (2*HZ)
93 /* The number of Tx and Rx buffers. These are allocated from the page
94 * pool. The code may assume these are power of two, so it is best
95 * to keep them that size.
96 * We don't need to allocate pages for the transmitter. We just use
97 * the skbuffer directly.
99 #ifdef CONFIG_ENET_BIG_BUFFERS
100 #define CPM_ENET_RX_PAGES 32
101 #define CPM_ENET_RX_FRSIZE 2048
102 #define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
103 #define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
104 #define TX_RING_SIZE 64 /* Must be power of two */
105 #define TX_RING_MOD_MASK 63 /* for this to work */
107 #define CPM_ENET_RX_PAGES 4
108 #define CPM_ENET_RX_FRSIZE 2048
109 #define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
110 #define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
111 #define TX_RING_SIZE 8 /* Must be power of two */
112 #define TX_RING_MOD_MASK 7 /* for this to work */
115 /* The CPM stores dest/src/type, data, and checksum for receive packets.
117 #define PKT_MAXBUF_SIZE 1518
118 #define PKT_MINBUF_SIZE 64
119 #define PKT_MAXBLR_SIZE 1520
121 /* The CPM buffer descriptors track the ring buffers. The rx_bd_base and
122 * tx_bd_base always point to the base of the buffer descriptors. The
123 * cur_rx and cur_tx point to the currently available buffer.
124 * The dirty_tx tracks the current buffer that is being sent by the
125 * controller. The cur_tx and dirty_tx are equal under both completely
126 * empty and completely full conditions. The empty/ready indicator in
127 * the buffer descriptor determines the actual condition.
129 struct scc_enet_private {
130 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
131 struct sk_buff* tx_skbuff[TX_RING_SIZE];
135 /* CPM dual port RAM relative addresses.
137 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
139 cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
140 cbd_t *dirty_tx; /* The ring entries to be free()ed. */
143 /* Virtual addresses for the receive buffers because we can't
144 * do a __va() on them anymore.
146 unsigned char *rx_vaddr[RX_RING_SIZE];
147 struct net_device_stats stats;
152 static int scc_enet_open(struct net_device *dev);
153 static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
154 static int scc_enet_rx(struct net_device *dev);
155 static void scc_enet_interrupt(void *dev_id, struct pt_regs *regs);
156 static int scc_enet_close(struct net_device *dev);
157 static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
158 static void set_multicast_list(struct net_device *dev);
160 /* Get this from various configuration locations (depends on board).
162 /*static ushort my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/
164 /* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards
165 * use SCC2. Some even may use SCC3.
166 * This is easily extended if necessary.
168 #if defined(CONFIG_SCC3_ENET)
169 #define CPM_CR_ENET CPM_CR_CH_SCC3
170 #define PROFF_ENET PROFF_SCC3
171 #define SCC_ENET 2 /* Index, not number! */
172 #define CPMVEC_ENET CPMVEC_SCC3
173 #elif defined(CONFIG_SCC2_ENET)
174 #define CPM_CR_ENET CPM_CR_CH_SCC2
175 #define PROFF_ENET PROFF_SCC2
176 #define SCC_ENET 1 /* Index, not number! */
177 #define CPMVEC_ENET CPMVEC_SCC2
178 #elif defined(CONFIG_SCC1_ENET)
179 #define CPM_CR_ENET CPM_CR_CH_SCC1
180 #define PROFF_ENET PROFF_SCC1
181 #define SCC_ENET 0 /* Index, not number! */
182 #define CPMVEC_ENET CPMVEC_SCC1
184 #error CONFIG_SCCx_ENET not defined
188 scc_enet_open(struct net_device *dev)
191 /* I should reset the ring buffers here, but I don't yet know
192 * a simple way to do that.
195 netif_start_queue(dev);
196 return 0; /* Always succeed */
200 scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
202 struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
205 /* Fill in a Tx ring entry */
208 #ifndef final_version
209 if (bdp->cbd_sc & BD_ENET_TX_READY) {
210 /* Ooops. All transmit buffers are full. Bail out.
211 * This should not happen, since cep->tx_busy should be set.
213 printk("%s: tx queue full!.\n", dev->name);
218 /* Clear all of the status flags.
220 bdp->cbd_sc &= ~BD_ENET_TX_STATS;
222 /* If the frame is short, tell CPM to pad it.
224 if (skb->len <= ETH_ZLEN)
225 bdp->cbd_sc |= BD_ENET_TX_PAD;
227 bdp->cbd_sc &= ~BD_ENET_TX_PAD;
229 /* Set buffer length and buffer pointer.
231 bdp->cbd_datlen = skb->len;
232 bdp->cbd_bufaddr = __pa(skb->data);
236 cep->tx_skbuff[cep->skb_cur] = skb;
238 cep->stats.tx_bytes += skb->len;
239 cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
241 /* Push the data cache so the CPM does not get stale memory
244 flush_dcache_range((unsigned long)(skb->data),
245 (unsigned long)(skb->data + skb->len));
247 spin_lock_irq(&cep->lock);
249 /* Send it on its way. Tell CPM its ready, interrupt when done,
250 * its the last BD of the frame, and to put the CRC on the end.
252 bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
254 dev->trans_start = jiffies;
256 /* If this was the last BD in the ring, start at the beginning again.
258 if (bdp->cbd_sc & BD_ENET_TX_WRAP)
259 bdp = cep->tx_bd_base;
263 if (bdp->cbd_sc & BD_ENET_TX_READY) {
264 netif_stop_queue(dev);
268 cep->cur_tx = (cbd_t *)bdp;
270 spin_unlock_irq(&cep->lock);
276 scc_enet_timeout(struct net_device *dev)
278 struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
280 printk("%s: transmit timed out.\n", dev->name);
281 cep->stats.tx_errors++;
282 #ifndef final_version
286 printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
287 cep->cur_tx, cep->tx_full ? " (full)" : "",
289 bdp = cep->tx_bd_base;
290 for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
291 printk("%04x %04x %08x\n",
295 bdp = cep->rx_bd_base;
296 for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
297 printk("%04x %04x %08x\n",
304 netif_wake_queue(dev);
307 /* The interrupt handler.
308 * This is called from the CPM handler, not the MPC core interrupt.
311 scc_enet_interrupt(void *dev_id, struct pt_regs *regs)
313 struct net_device *dev = dev_id;
314 volatile struct scc_enet_private *cep;
319 cep = (struct scc_enet_private *)dev->priv;
321 /* Get the interrupt events that caused us to be here.
323 int_events = cep->sccp->scc_scce;
324 cep->sccp->scc_scce = int_events;
327 /* Handle receive event in its own function.
329 if (int_events & SCCE_ENET_RXF)
332 /* Check for a transmit error. The manual is a little unclear
333 * about this, so the debug code until I get it figured out. It
334 * appears that if TXE is set, then TXB is not set. However,
335 * if carrier sense is lost during frame transmission, the TXE
336 * bit is set, "and continues the buffer transmission normally."
337 * I don't know if "normally" implies TXB is set when the buffer
338 * descriptor is closed.....trial and error :-).
341 /* Transmit OK, or non-fatal error. Update the buffer descriptors.
343 if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
344 spin_lock(&cep->lock);
346 while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
347 if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
350 if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
351 cep->stats.tx_heartbeat_errors++;
352 if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
353 cep->stats.tx_window_errors++;
354 if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
355 cep->stats.tx_aborted_errors++;
356 if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
357 cep->stats.tx_fifo_errors++;
358 if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
359 cep->stats.tx_carrier_errors++;
362 /* No heartbeat or Lost carrier are not really bad errors.
363 * The others require a restart transmit command.
366 (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
368 cep->stats.tx_errors++;
371 cep->stats.tx_packets++;
373 /* Deferred means some collisions occurred during transmit,
374 * but we eventually sent the packet OK.
376 if (bdp->cbd_sc & BD_ENET_TX_DEF)
377 cep->stats.collisions++;
379 /* Free the sk buffer associated with this last transmit.
381 dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
382 cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
384 /* Update pointer to next buffer descriptor to be transmitted.
386 if (bdp->cbd_sc & BD_ENET_TX_WRAP)
387 bdp = cep->tx_bd_base;
391 /* I don't know if we can be held off from processing these
392 * interrupts for more than one frame time. I really hope
393 * not. In such a case, we would now want to check the
394 * currently available BD (cur_tx) and determine if any
395 * buffers between the dirty_tx and cur_tx have also been
396 * sent. We would want to process anything in between that
397 * does not have BD_ENET_TX_READY set.
400 /* Since we have freed up a buffer, the ring is no longer
405 if (netif_queue_stopped(dev))
406 netif_wake_queue(dev);
409 cep->dirty_tx = (cbd_t *)bdp;
413 volatile cpm8xx_t *cp;
415 /* Some transmit errors cause the transmitter to shut
416 * down. We now issue a restart transmit. Since the
417 * errors close the BD and update the pointers, the restart
418 * _should_ pick up without having to reset any of our
423 mk_cr_cmd(CPM_CR_ENET, CPM_CR_RESTART_TX) | CPM_CR_FLG;
424 while (cp->cp_cpcr & CPM_CR_FLG);
426 spin_unlock(&cep->lock);
429 /* Check for receive busy, i.e. packets coming but no place to
430 * put them. This "can't happen" because the receive interrupt
431 * is tossing previous frames.
433 if (int_events & SCCE_ENET_BSY) {
434 cep->stats.rx_dropped++;
435 printk("CPM ENET: BSY can't happen.\n");
441 /* During a receive, the cur_rx points to the current incoming buffer.
442 * When we update through the ring, if the next incoming buffer has
443 * not been given to the system, we just set the empty indicator,
444 * effectively tossing the packet.
447 scc_enet_rx(struct net_device *dev)
449 struct scc_enet_private *cep;
454 cep = (struct scc_enet_private *)dev->priv;
456 /* First, grab all of the stats for the incoming packet.
457 * These get messed up if we get called due to a busy condition.
462 if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
465 #ifndef final_version
466 /* Since we have allocated space to hold a complete frame, both
467 * the first and last indicators should be set.
469 if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
470 (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
471 printk("CPM ENET: rcv is not first+last\n");
474 /* Frame too long or too short.
476 if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
477 cep->stats.rx_length_errors++;
478 if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
479 cep->stats.rx_frame_errors++;
480 if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
481 cep->stats.rx_crc_errors++;
482 if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
483 cep->stats.rx_crc_errors++;
485 /* Report late collisions as a frame error.
486 * On this error, the BD is closed, but we don't know what we
487 * have in the buffer. So, just drop this frame on the floor.
489 if (bdp->cbd_sc & BD_ENET_RX_CL) {
490 cep->stats.rx_frame_errors++;
494 /* Process the incoming frame.
496 cep->stats.rx_packets++;
497 pkt_len = bdp->cbd_datlen;
498 cep->stats.rx_bytes += pkt_len;
500 /* This does 16 byte alignment, much more than we need.
501 * The packet length includes FCS, but we don't want to
502 * include that when passing upstream as it messes up
503 * bridging applications.
505 skb = dev_alloc_skb(pkt_len-4);
508 printk("%s: Memory squeeze, dropping packet.\n", dev->name);
509 cep->stats.rx_dropped++;
513 skb_put(skb,pkt_len-4); /* Make room */
514 eth_copy_and_sum(skb,
515 cep->rx_vaddr[bdp - cep->rx_bd_base],
517 skb->protocol=eth_type_trans(skb,dev);
522 /* Clear the status flags for this buffer.
524 bdp->cbd_sc &= ~BD_ENET_RX_STATS;
526 /* Mark the buffer empty.
528 bdp->cbd_sc |= BD_ENET_RX_EMPTY;
530 /* Update BD pointer to next entry.
532 if (bdp->cbd_sc & BD_ENET_RX_WRAP)
533 bdp = cep->rx_bd_base;
538 cep->cur_rx = (cbd_t *)bdp;
544 scc_enet_close(struct net_device *dev)
546 /* Don't know what to do yet.
548 netif_stop_queue(dev);
553 static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
555 struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
560 /* Set or clear the multicast filter for this adaptor.
561 * Skeleton taken from sunlance driver.
562 * The CPM Ethernet implementation allows Multicast as well as individual
563 * MAC address filtering. Some of the drivers check to make sure it is
564 * a group multicast address, and discard those that are not. I guess I
565 * will do the same for now, but just remove the test if you want
566 * individual filtering as well (do the upper net layers want or support
567 * this kind of feature?).
570 static void set_multicast_list(struct net_device *dev)
572 struct scc_enet_private *cep;
573 struct dev_mc_list *dmi;
574 u_char *mcptr, *tdptr;
575 volatile scc_enet_t *ep;
577 cep = (struct scc_enet_private *)dev->priv;
579 /* Get pointer to SCC area in parameter RAM.
581 ep = (scc_enet_t *)dev->base_addr;
583 if (dev->flags&IFF_PROMISC) {
585 /* Log any net taps. */
586 printk("%s: Promiscuous mode enabled.\n", dev->name);
587 cep->sccp->scc_pmsr |= SCC_PMSR_PRO;
590 cep->sccp->scc_pmsr &= ~SCC_PMSR_PRO;
592 if (dev->flags & IFF_ALLMULTI) {
593 /* Catch all multicast addresses, so set the
596 ep->sen_gaddr1 = 0xffff;
597 ep->sen_gaddr2 = 0xffff;
598 ep->sen_gaddr3 = 0xffff;
599 ep->sen_gaddr4 = 0xffff;
602 /* Clear filter and add the addresses in the list.
611 for (i=0; i<dev->mc_count; i++) {
613 /* Only support group multicast for now.
615 if (!(dmi->dmi_addr[0] & 1))
618 /* The address in dmi_addr is LSB first,
619 * and taddr is MSB first. We have to
620 * copy bytes MSB first from dmi_addr.
622 mcptr = (u_char *)dmi->dmi_addr + 5;
623 tdptr = (u_char *)&ep->sen_taddrh;
627 /* Ask CPM to run CRC and set bit in
630 cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_SET_GADDR) | CPM_CR_FLG;
631 /* this delay is necessary here -- Cort */
633 while (cpmp->cp_cpcr & CPM_CR_FLG);
639 /* Initialize the CPM Ethernet on SCC. If EPPC-Bug loaded us, or performed
640 * some other network I/O, a whole bunch of this has already been set up.
641 * It is no big deal if we do it again, we just have to disable the
642 * transmit and receive to make sure we don't catch the CPM with some
643 * inconsistent control information.
645 int __init scc_enet_init(void)
647 struct net_device *dev;
648 struct scc_enet_private *cep;
650 unsigned char *eap, *ba;
654 volatile cpm8xx_t *cp;
655 volatile scc_t *sccp;
656 volatile scc_enet_t *ep;
657 volatile immap_t *immap;
659 cp = cpmp; /* Get pointer to Communication Processor */
661 immap = (immap_t *)(mfspr(IMMR) & 0xFFFF0000); /* and to internal registers */
665 /* Allocate some private information.
667 cep = (struct scc_enet_private *)kmalloc(sizeof(*cep), GFP_KERNEL);
671 __clear_user(cep,sizeof(*cep));
672 spin_lock_init(&cep->lock);
674 /* Create an Ethernet device instance.
676 dev = init_etherdev(0, 0);
678 /* Get pointer to SCC area in parameter RAM.
680 ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
682 /* And another to the SCC register area.
684 sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]);
685 cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
687 /* Disable receive and transmit in case EPPC-Bug started it.
689 sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
691 /* Cookbook style from the MPC860 manual.....
692 * Not all of this is necessary if EPPC-Bug has initialized
694 * So far we are lucky, all board configurations use the same
695 * pins, or at least the same I/O Port for these functions.....
696 * It can't last though......
699 #if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
700 /* Configure port A pins for Txd and Rxd.
702 immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
703 immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
704 immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
705 #elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
706 /* Configure port B pins for Txd and Rxd.
708 immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
709 immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
710 immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
712 #error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
715 #if defined(PC_ENET_LBK)
716 /* Configure port C pins to disable External Loopback
718 immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
719 immap->im_ioport.iop_pcdir |= PC_ENET_LBK;
720 immap->im_ioport.iop_pcso &= ~PC_ENET_LBK;
721 immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
722 #endif /* PC_ENET_LBK */
724 /* Configure port C pins to enable CLSN and RENA.
726 immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
727 immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
728 immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
730 /* Configure port A for TCLK and RCLK.
732 immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
733 immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
735 /* Configure Serial Interface clock routing.
736 * First, clear all SCC bits to zero, then set the ones we want.
738 cp->cp_sicr &= ~SICR_ENET_MASK;
739 cp->cp_sicr |= SICR_ENET_CLKRT;
741 /* Manual says set SDDR, but I can't find anything with that
742 * name. I think it is a misprint, and should be SDCR. This
743 * has already been set by the communication processor initialization.
746 /* Allocate space for the buffer descriptors in the DP ram.
747 * These are relative offsets in the DP ram address space.
748 * Initialize base addresses for the buffer descriptors.
750 i = m8xx_cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE);
751 ep->sen_genscc.scc_rbase = i;
752 cep->rx_bd_base = (cbd_t *)&cp->cp_dpmem[i];
754 i = m8xx_cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE);
755 ep->sen_genscc.scc_tbase = i;
756 cep->tx_bd_base = (cbd_t *)&cp->cp_dpmem[i];
758 cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
759 cep->cur_rx = cep->rx_bd_base;
761 /* Issue init Rx BD command for SCC.
762 * Manual says to perform an Init Rx parameters here. We have
763 * to perform both Rx and Tx because the SCC may have been
765 * In addition, we have to do it later because we don't yet have
766 * all of the BD control/status set properly.
767 cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG;
768 while (cp->cp_cpcr & CPM_CR_FLG);
771 /* Initialize function code registers for big-endian.
773 ep->sen_genscc.scc_rfcr = SCC_EB;
774 ep->sen_genscc.scc_tfcr = SCC_EB;
776 /* Set maximum bytes per receive buffer.
777 * This appears to be an Ethernet frame size, not the buffer
778 * fragment size. It must be a multiple of four.
780 ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
782 /* Set CRC preset and mask.
784 ep->sen_cpres = 0xffffffff;
785 ep->sen_cmask = 0xdebb20e3;
787 ep->sen_crcec = 0; /* CRC Error counter */
788 ep->sen_alec = 0; /* alignment error counter */
789 ep->sen_disfc = 0; /* discard frame counter */
791 ep->sen_pads = 0x8888; /* Tx short frame pad character */
792 ep->sen_retlim = 15; /* Retry limit threshold */
794 ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
795 ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
797 ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
798 ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
800 /* Clear hash tables.
811 /* Set Ethernet station address.
813 eap = (unsigned char *)&(ep->sen_paddrh);
815 *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
817 ep->sen_pper = 0; /* 'cause the book says so */
818 ep->sen_taddrl = 0; /* temp address (LSB) */
820 ep->sen_taddrh = 0; /* temp address (MSB) */
822 /* Now allocate the host memory pages and initialize the
823 * buffer descriptors.
825 bdp = cep->tx_bd_base;
826 for (i=0; i<TX_RING_SIZE; i++) {
828 /* Initialize the BD for every fragment in the page.
831 bdp->cbd_bufaddr = 0;
835 /* Set the last buffer to wrap.
838 bdp->cbd_sc |= BD_SC_WRAP;
840 bdp = cep->rx_bd_base;
842 for (i=0; i<CPM_ENET_RX_PAGES; i++) {
846 ba = (unsigned char *)consistent_alloc(GFP_KERNEL, PAGE_SIZE, &mem_addr);
848 /* Initialize the BD for every fragment in the page.
850 for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
851 bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
852 bdp->cbd_bufaddr = mem_addr;
853 cep->rx_vaddr[k++] = ba;
854 mem_addr += CPM_ENET_RX_FRSIZE;
855 ba += CPM_ENET_RX_FRSIZE;
860 /* Set the last buffer to wrap.
863 bdp->cbd_sc |= BD_SC_WRAP;
865 /* Let's re-initialize the channel now. We have to do it later
866 * than the manual describes because we have just now finished
867 * the BD initialization.
869 cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG;
870 while (cp->cp_cpcr & CPM_CR_FLG);
872 cep->skb_cur = cep->skb_dirty = 0;
874 sccp->scc_scce = 0xffff; /* Clear any pending events */
876 /* Enable interrupts for transmit error, complete frame
877 * received, and any transmit buffer we have also set the
880 sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
882 /* Install our interrupt handler.
884 cpm_install_handler(CPMVEC_ENET, scc_enet_interrupt, dev);
886 /* Set GSMR_H to enable all normal operating modes.
887 * Set GSMR_L to enable Ethernet to MC68160.
890 sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
892 /* Set sync/delimiters.
894 sccp->scc_dsr = 0xd555;
896 /* Set processing mode. Use Ethernet CRC, catch broadcast, and
897 * start frame search 22 bit times after RENA.
899 sccp->scc_pmsr = (SCC_PMSR_ENCRC | SCC_PMSR_NIB22);
901 /* It is now OK to enable the Ethernet transmitter.
902 * Unfortunately, there are board implementation differences here.
904 #if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA))
905 immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
906 immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
907 #elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
908 cp->cp_pbpar |= PB_ENET_TENA;
909 cp->cp_pbdir |= PB_ENET_TENA;
911 #error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
914 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
915 /* And while we are here, set the configuration to enable ethernet.
917 *((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
918 *((volatile uint *)RPX_CSR_ADDR) |=
919 (BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS);
923 /* BSE uses port B and C for PHY control.
925 cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
926 cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
927 cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
929 immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK;
930 immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK;
931 immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK;
932 immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
936 cp->cp_pbpar |= PB_ENET_TENA;
937 cp->cp_pbdir |= PB_ENET_TENA;
939 /* Enable the EEST PHY.
941 *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
944 dev->base_addr = (unsigned long)ep;
947 dev->name = "CPM_ENET";
950 /* The CPM Ethernet specific entries in the device structure. */
951 dev->open = scc_enet_open;
952 dev->hard_start_xmit = scc_enet_start_xmit;
953 dev->tx_timeout = scc_enet_timeout;
954 dev->watchdog_timeo = TX_TIMEOUT;
955 dev->stop = scc_enet_close;
956 dev->get_stats = scc_enet_get_stats;
957 dev->set_multicast_list = set_multicast_list;
959 /* And last, enable the transmit and receive processing.
961 sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
963 printk("%s: CPM ENET Version 0.2 on SCC%d, ", dev->name, SCC_ENET+1);
965 printk("%02x:", dev->dev_addr[i]);
966 printk("%02x\n", dev->dev_addr[5]);