1 /************************************************************************/
2 /* This module supports the iSeries PCI bus interrupt handling */
3 /* Copyright (C) 20yy <Robert L Holtorf> <IBM Corp> */
5 /* This program is free software; you can redistribute it and/or modify */
6 /* it under the terms of the GNU General Public License as published by */
7 /* the Free Software Foundation; either version 2 of the License, or */
8 /* (at your option) any later version. */
10 /* This program is distributed in the hope that it will be useful, */
11 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
12 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
13 /* GNU General Public License for more details. */
15 /* You should have received a copy of the GNU General Public License */
16 /* along with this program; if not, write to the: */
17 /* Free Software Foundation, Inc., */
18 /* 59 Temple Place, Suite 330, */
19 /* Boston, MA 02111-1307 USA */
20 /************************************************************************/
21 /* Change Activity: */
22 /* Created, December 13, 2000 by Wayne Holm */
23 /* End Change Activity */
24 /************************************************************************/
26 #include <linux/pci.h>
27 #include <linux/config.h>
28 #include <linux/init.h>
29 #include <linux/threads.h>
30 #include <linux/smp.h>
31 #include <linux/param.h>
32 #include <linux/string.h>
33 #include <linux/bootmem.h>
34 #include <linux/blk.h>
35 #include <linux/ide.h>
37 #include <linux/irq.h>
38 #include <linux/spinlock.h>
39 #include <linux/malloc.h>
41 #include <asm/iSeries/HvCallPci.h>
42 #include <asm/iSeries/HvCallXm.h>
43 #include <asm/iSeries/iSeries_irq.h>
44 #include <asm/iSeries/XmPciLpEvent.h>
47 hw_irq_controller iSeries_IRQ_handler = {
48 "iSeries irq controller",
49 iSeries_startup_IRQ, /* startup */
50 iSeries_shutdown_IRQ, /* shutdown */
51 iSeries_enable_IRQ, /* enable */
52 iSeries_disable_IRQ, /* disable */
54 iSeries_end_IRQ, /* end */
55 NULL /* set_affinity */
59 struct iSeries_irqEntry {
61 struct iSeries_irqEntry* next;
64 struct iSeries_irqAnchor {
68 struct iSeries_irqEntry* head;
71 struct iSeries_irqAnchor iSeries_irqMap[NR_IRQS];
73 void iSeries_init_irqMap(int irq);
75 /* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c */
76 void __init iSeries_init_IRQ(void)
81 for (i = 0; i < NR_IRQS; i++) {
82 irq_desc[i].handler = &iSeries_IRQ_handler;
83 irq_desc[i].status = 0;
84 irq_desc[i].status |= IRQ_DISABLED;
85 irq_desc[i].depth = 1;
86 iSeries_init_irqMap(i);
89 /* Register PCI event handler and open an event path */
95 /* Called by iSeries_init_IRQ */
96 void __init iSeries_init_irqMap(int irq) {
97 /* Prevent IRQs 0 and 255 from being used. IRQ 0 appears in
98 uninitialized devices. IRQ 255 appears in the PCI interrupt
99 line register if a PCI error occurs */
100 iSeries_irqMap[irq].valid = (irq == 0 || irq == 255)? 0 : 1;
101 iSeries_irqMap[irq].entryCount = 0;
102 iSeries_irqMap[irq].head = NULL;
105 /* This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot */
106 int __init iSeries_allocate_IRQ(HvBusNumber busNumber, HvSubBusNumber subBusNumber, HvAgentId deviceId) {
108 u8 idsel = (deviceId >> 4);
109 u8 function = deviceId & 0x0F;
110 int irq = ((((busNumber-1)*16 + (idsel-1)*8 + function)*9/8) % 254) + 1;
114 /* This is called out of iSeries_scan_slot to assign the EADS slot to its IRQ number */
115 int __init iSeries_assign_IRQ(int irq, HvBusNumber busNumber, HvSubBusNumber subBusNumber, HvAgentId deviceId) {
118 u32 dsa = (busNumber << 16) | (subBusNumber << 8) | deviceId;
119 struct iSeries_irqEntry* newEntry;
122 if (irq < 0 || irq >= NR_IRQS)
125 newEntry = kmalloc(sizeof(*newEntry), GFP_KERNEL);
126 if (newEntry == NULL)
129 newEntry->next = NULL;
131 /* Probably not necessary to lock the irq since allocation is only
132 done during buswalk, but it should not hurt anything except a little
134 spin_lock_irqsave(&irq_desc[irq].lock, flags);
136 if (iSeries_irqMap[irq].valid) {
137 /* Push the new element onto the irq stack */
138 newEntry->next = iSeries_irqMap[irq].head;
139 iSeries_irqMap[irq].head = newEntry;
140 ++iSeries_irqMap[irq].entryCount;
146 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
148 if (rc != 0 && newEntry)
156 /* This is called by iSeries_activate_IRQs */
157 unsigned int iSeries_startup_IRQ(unsigned int irq) {
158 struct iSeries_irqEntry* entry;
159 u32 bus, subBus, deviceId, function, mask;
161 /* irq should be locked by the caller */
163 for(entry=iSeries_irqMap[irq].head; entry!=NULL; entry=entry->next) {
164 bus = (entry->dsa >> 16) & 0xFFFF;
165 subBus = (entry->dsa >> 8) & 0xFF;
166 deviceId = entry->dsa & 0xFF;
167 function = deviceId & 0x0F;
168 /* Link the IRQ number to the bridge */
169 HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
170 /* Unmask bridge interrupts in the FISR */
171 mask = 0x01010000 << function;
172 HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
178 /* This is called out of iSeries_fixup to
179 activate interrupt generation for usable slots */
180 void __init iSeries_activate_IRQs() {
184 for (irq=0; irq < NR_IRQS; irq++) {
185 spin_lock_irqsave(&irq_desc[irq].lock, flags);
186 irq_desc[irq].handler->startup(irq);
187 spin_unlock_irqrestore(&irq_desc[irq].lock, flags);
192 /* this is not called anywhere currently */
193 void iSeries_shutdown_IRQ(unsigned int irq) {
194 struct iSeries_irqEntry* entry;
195 u32 bus, subBus, deviceId, function, mask;
197 /* irq should be locked by the caller */
199 for(entry=iSeries_irqMap[irq].head; entry; entry=entry->next) {
200 bus = (entry->dsa >> 16) & 0xFFFF;
201 subBus = (entry->dsa >> 8) & 0xFF;
202 deviceId = entry->dsa & 0xFF;
203 function = deviceId & 0x0F;
204 /* Invalidate the IRQ number in the bridge */
205 HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
206 /* Mask bridge interrupts in the FISR */
207 mask = 0x01010000 << function;
208 HvCallPci_maskFisr(bus, subBus, deviceId, mask);
214 /* This will be called by device drivers (via disable_IRQ to disable
215 INTA in the bridge interrupt status register */
216 void iSeries_disable_IRQ(unsigned int irq) {
217 struct iSeries_irqEntry* entry;
218 u32 bus, subBus, deviceId, mask;
220 /* The IRQ has already been locked by the caller */
222 for(entry=iSeries_irqMap[irq].head; entry; entry=entry->next) {
223 bus = (entry->dsa >> 16) & 0xFFFF;
224 subBus = (entry->dsa >> 8) & 0xFF;
225 deviceId = entry->dsa & 0xFF;
226 /* Mask secondary INTA */
228 HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
232 /* This will be called by device drivers (via enable_IRQ to enable
233 INTA in the bridge interrupt status register */
234 void iSeries_enable_IRQ(unsigned int irq) {
235 struct iSeries_irqEntry* entry;
236 u32 bus, subBus, deviceId, mask;
238 /* The IRQ has already been locked by the caller */
240 for(entry=iSeries_irqMap[irq].head; entry; entry=entry->next) {
241 bus = (entry->dsa >> 16) & 0xFFFF;
242 subBus = (entry->dsa >> 8) & 0xFF;
243 deviceId = entry->dsa & 0xFF;
244 /* Unmask secondary INTA */
246 HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
250 /* Need to define this so ppc_irq_dispatch_handler will NOT call
251 enable_IRQ at the end of interrupt handling. However, this
252 does nothing because there is not enough information provided
253 to do the EOI HvCall. This is done by XmPciLpEvent.c */
254 void iSeries_end_IRQ(unsigned int irq) {