2 * arch/ppc/platforms/ev64260.h
4 * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board.
6 * Author: Mark A. Greer <mgreer@mvista.com>
8 * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2.1. This program
10 * is licensed "as is" without any warranty of any kind, whether express
15 * The GT64260 has 2 PCI buses each with 1 window from the CPU bus to
16 * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
17 * We'll only use one PCI MEM window on each PCI bus.
19 * This is the CPU physical memory map (windows must be at least 1MB and start
20 * on a boundary that is a multiple of the window size):
22 * 0xfc000000-0xffffffff - External FLASH on device module
23 * 0xfbf00000-0xfbffffff - Embedded (on board) FLASH
24 * 0xfbe00000-0xfbefffff - GT64260 Registers (preferably)
25 * but really a config option
26 * 0xfbd00000-0xfbdfffff - External SRAM on device module
27 * 0xfbc00000-0xfbcfffff - TODC chip on device module
28 * 0xfbb00000-0xfbbfffff - External UART on device module
29 * 0xa2000000-0xfbafffff - <hole>
30 * 0xa1000000-0xa1ffffff - PCI 1 I/O (defined in gt64260.h)
31 * 0xa0000000-0xa0ffffff - PCI 0 I/O (defined in gt64260.h)
32 * 0x90000000-0x9fffffff - PCI 1 MEM (defined in gt64260.h)
33 * 0x80000000-0x8fffffff - PCI 0 MEM (defined in gt64260.h)
35 * XXX: FIXME: PPCBoot uses EVB64260_BRIDGE_REG_BASE as 0xf8000000
36 * This happens to not conflict with the current memory map, but
37 * it should get fixed eventually anyway.
40 #ifndef __PPC_PLATFORMS_EV64260_H
41 #define __PPC_PLATFORMS_EV64260_H
44 #define MAX(a,b) (((a) > (b)) ? (a) : (b))
49 * CPU Physical Memory Map setup.
51 #define EV64260_EXT_FLASH_BASE 0xfc000000
52 #define EV64260_EMB_FLASH_BASE 0xfbf00000
53 #define EV64260_EXT_SRAM_BASE 0xfbd00000
54 #define EV64260_TODC_BASE 0xfbc00000
55 #define EV64260_UART_BASE 0xfbb00000
57 #define EV64260_EXT_FLASH_SIZE_ACTUAL 0x04000000 /* <= 64MB Extern FLASH */
58 #define EV64260_EMB_FLASH_SIZE_ACTUAL 0x00080000 /* 512KB of Embed FLASH */
59 #define EV64260_EXT_SRAM_SIZE_ACTUAL 0x00100000 /* 1MB SDRAM */
60 #define EV64260_TODC_SIZE_ACTUAL 0x00000020 /* 32 bytes for TODC */
61 #define EV64260_UART_SIZE_ACTUAL 0x00000040 /* 64 bytes for DUART */
63 #define EV64260_EXT_FLASH_SIZE MAX(GT64260_WINDOW_SIZE_MIN, \
64 EV64260_EXT_FLASH_SIZE_ACTUAL)
65 #define EV64260_EMB_FLASH_SIZE MAX(GT64260_WINDOW_SIZE_MIN, \
66 EV64260_EMB_FLASH_SIZE_ACTUAL)
67 #define EV64260_EXT_SRAM_SIZE MAX(GT64260_WINDOW_SIZE_MIN, \
68 EV64260_EXT_SRAM_SIZE_ACTUAL)
69 #define EV64260_TODC_SIZE MAX(GT64260_WINDOW_SIZE_MIN, \
70 EV64260_TODC_SIZE_ACTUAL)
71 #if 0 /* blows up assembler in bootloader */
72 #define EV64260_UART_SIZE MAX(GT64260_WINDOW_SIZE_MIN, \
73 EV64260_UART_SIZE_ACTUAL)
75 #define EV64260_UART_SIZE GT64260_WINDOW_SIZE_MIN
77 #define EV64260_UART_END ((EV64260_UART_BASE + \
78 EV64260_UART_SIZE - 1) & 0xfff00000)
80 #if !defined(CONFIG_GT64260_CONSOLE)
82 * Serial driver setup.
84 #define EV64260_SERIAL_0 (EV64260_UART_BASE + 0x20)
85 #define EV64260_SERIAL_1 EV64260_UART_BASE
87 #define BASE_BAUD ( 3686400 / 16 )
89 #ifdef CONFIG_SERIAL_MANY_PORTS
90 #define RS_TABLE_SIZE 64
92 #define RS_TABLE_SIZE 2
95 #ifdef CONFIG_SERIAL_DETECT_IRQ
96 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
98 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
101 /* Required for bootloader's ns16550.c code */
102 #define STD_SERIAL_PORT_DFNS \
103 { 0, BASE_BAUD, EV64260_SERIAL_0, 85, STD_COM_FLAGS, /* ttyS0 */\
104 iomem_base: (u8 *)EV64260_SERIAL_0, \
105 iomem_reg_shift: 2, \
106 io_type: SERIAL_IO_MEM },
108 #define SERIAL_PORT_DFNS \
110 #else /* if defined(CONFIG_GT64260_CONSOLE) */
111 #define SERIAL_PORT_DFNS
112 #endif /* !defined(CONFIG_GT64260_CONSOLE) */
115 * Board-specific IRQ info
117 #define EV64260_UART_0_IRQ 85
118 #define EV64260_UART_1_IRQ 86
120 #define EV64260_PCI_0_IRQ 91
121 #define EV64260_PCI_1_IRQ 93
123 #endif /* CONFIG_EV64260 */
125 #endif /* __PPC_PLATFORMS_EV64260_H */