arch/ppc/platforms/lopec_setup.c

   1 /*
   2  * arch/ppc/platforms/lopec_setup.c
   3  *
   4  * Setup routines for the Motorola LoPEC.
   5  *
   6  * Author: Dan Cox
   7  *         danc@mvista.com
   8  *
   9  * Copyright 2001-2002 MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute  it and/or modify it
  12  * under  the terms of  the GNU General Public License as published by the
  13  * Free Software Foundation;  either version 2 of the  License, or (at your
  14  * option) any later version.
  15  */
  16
  17 #include <linux/config.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/pci.h>
  22 #include <linux/time.h>
  23 #include <linux/types.h>
  24 #include <linux/major.h>
  25 #include <linux/kdev_t.h>
  26 #include <linux/ide.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/console.h>
  30 #include <linux/serial.h>
  31 #include <linux/serialP.h>
  32
  33 #include <asm/system.h>
  34 #include <asm/pgtable.h>
  35 #include <asm/machdep.h>
  36 #include <asm/page.h>
  37 #include <asm/dma.h>
  38 #include <asm/io.h>
  39 #include <asm/time.h>
  40 #include <asm/delay.h>
  41 #include <asm/irq.h>
  42 #include <asm/open_pic.h>
  43 #include <asm/i8259.h>
  44 #include <asm/pci-bridge.h>
  45 #include <asm/todc.h>
  46 #include <asm/bootinfo.h>
  47 #include <asm/mpc10x.h>
  48 #include <asm/keyboard.h>
  49 #include <asm/prep_nvram.h>
  50 #include <asm/serial.h>
  51
  52 extern char saved_command_line[];
  53 extern void lopec_find_bridges(void);
  54
  55 extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
  56 extern int pckbd_getkeycode(unsigned int scancode);
  57 extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
  58                            char raw_mode);
  59 extern char pckbd_unexpected_up(unsigned char keycode);
  60 extern void pckbd_leds(unsigned char leds);
  61 extern void pckbd_init_hw(void);
  62 extern unsigned char pckbd_sysrq_xlate[128];
  63 extern void gen550_progress(char *, unsigned short);
  64 extern void gen550_init(int, struct serial_struct *);
  65
  66 /*
  67  * Define all of the IRQ senses and polarities.  Taken from the
  68  * LoPEC Programmer's Reference Guide */
  69 static u_char lopec_openpic_initsenses[17] __initdata = {
  70         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 0 */
  71         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 1 */
  72         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 2 */
  73         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 3 */
  74         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 4 */
  75         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 5 */
  76         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 6 */
  77         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 7 */
  78         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 8 */
  79         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 9 */
  80         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 10 */
  81         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 11 */
  82         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 12 */
  83         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 13 */
  84         (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE),       /* IRQ 14 */
  85         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE)       /* IRQ 15 */
  86 };
  87
  88 static int
  89 lopec_show_cpuinfo(struct seq_file *m)
  90 {
  91         seq_printf(m, "machine\t\t: Motorola LoPEC\n");
  92         return 0;
  93 }
  94
  95 static u32
  96 lopec_irq_cannonicalize(u32 irq)
  97 {
  98         if (irq == 2)
  99                 return 9;
 100         else
 101                 return irq;
 102 }
 103
 104 static void
 105 lopec_restart(char *cmd)
 106 {
 107 #define LOPEC_SYSSTAT1 0xffe00000
 108         /* force a hard reset, if possible */
 109         unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1);
 110         reg |= 0x80;
 111         *((unsigned char *) LOPEC_SYSSTAT1) = reg;
 112
 113         __cli();
 114         while(1);
 115 #undef LOPEC_SYSSTAT1
 116 }
 117
 118 static void
 119 lopec_halt(void)
 120 {
 121         __cli();
 122         while(1);
 123 }
 124
 125 static void
 126 lopec_power_off(void)
 127 {
 128         lopec_halt();
 129 }
 130
 131 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
 132 int lopec_ide_ports_known = 0;
 133 static ide_ioreg_t lopec_ide_regbase[MAX_HWIFS];
 134 static ide_ioreg_t lopec_ide_ctl_regbase[MAX_HWIFS];
 135 static ide_ioreg_t lopec_idedma_regbase;
 136
 137 static void
 138 lopec_ide_probe(void)
 139 {
 140         struct pci_dev *dev = pci_find_device(PCI_VENDOR_ID_WINBOND,
 141                                               PCI_DEVICE_ID_WINBOND_82C105,
 142                                               NULL);
 143         lopec_ide_ports_known = 1;
 144
 145         if (dev) {
 146                 lopec_ide_regbase[0] = dev->resource[0].start;
 147                 lopec_ide_regbase[1] = dev->resource[2].start;
 148                 lopec_ide_ctl_regbase[0] = dev->resource[1].start;
 149                 lopec_ide_ctl_regbase[1] = dev->resource[3].start;
 150                 lopec_idedma_regbase = dev->resource[4].start;
 151         }
 152 }
 153
 154 static int
 155 lopec_ide_default_irq(ide_ioreg_t base)
 156 {
 157         if (lopec_ide_ports_known == 0)
 158                 lopec_ide_probe();
 159
 160         if (base == lopec_ide_regbase[0])
 161                 return 14;
 162         else if (base == lopec_ide_regbase[1])
 163                 return 15;
 164         else
 165                 return 0;
 166 }
 167
 168 static ide_ioreg_t
 169 lopec_ide_default_io_base(int index)
 170 {
 171         if (lopec_ide_ports_known == 0)
 172                 lopec_ide_probe();
 173         return lopec_ide_regbase[index];
 174 }
 175
 176 static void __init
 177 lopec_ide_init_hwif_ports(hw_regs_t *hw, ide_ioreg_t data,
 178                           ide_ioreg_t ctl, int *irq)
 179 {
 180         ide_ioreg_t reg = data;
 181         uint alt_status_base;
 182         int i;
 183
 184         for(i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
 185                 hw->io_ports[i] = reg++;
 186
 187         if (data == lopec_ide_regbase[0]) {
 188                 alt_status_base = lopec_ide_ctl_regbase[0] + 2;
 189                 hw->irq = 14;
 190         }
 191         else if (data == lopec_ide_regbase[1]) {
 192                 alt_status_base = lopec_ide_ctl_regbase[1] + 2;
 193                 hw->irq = 15;
 194         }
 195         else {
 196                 alt_status_base = 0;
 197                 hw->irq = 0;
 198         }
 199
 200         if (ctl)
 201                 hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
 202         else
 203                 hw->io_ports[IDE_CONTROL_OFFSET] = alt_status_base;
 204
 205         if (irq != NULL)
 206                 *irq = hw->irq;
 207
 208 }
 209 #endif /* BLK_DEV_IDE */
 210
 211 static void __init
 212 lopec_init_IRQ(void)
 213 {
 214         int i;
 215
 216         OpenPIC_InitSenses = lopec_openpic_initsenses;
 217         OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses);
 218
 219         /*
 220          * We need to tell openpic_set_sources where things actually are.
 221          * mpc10x_common will setup OpenPIC_Addr at ioremap(EUMB phys base +
 222          * EPIC offset (0x40000));  The EPIC IRQ Register Address Map -
 223          * Interrupt Source Configuration Registers gives these numbers
 224          * as offsets starting at 0x50200, we need to adjust occordinly.
 225          */
 226         /* Map serial interrupts 0-15 */
 227         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10200);
 228         /* Skip reserved space and map i2c and DMA Ch[01] */
 229         openpic_set_sources(16, 3, OpenPIC_Addr + 0x11020);
 230         /* Skip reserved space and map Message Unit Interrupt (I2O) */
 231         openpic_set_sources(19, 1, OpenPIC_Addr + 0x110C0);
 232
 233         openpic_init(NUM_8259_INTERRUPTS);
 234         /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
 235         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 236                         &i8259_irq);
 237
 238         /* Map i8259 interrupts */
 239         for(i = 0; i < NUM_8259_INTERRUPTS; i++)
 240                 irq_desc[i].handler = &i8259_pic;
 241
 242         i8259_init(0);
 243 }
 244
 245 static void __init
 246 lopec_init2(void)
 247 {
 248         outb(0x00, 0x4d0);
 249         outb(0xc0, 0x4d1);
 250
 251         request_region(0x00, 0x20, "dma1");
 252         request_region(0x20, 0x20, "pic1");
 253         request_region(0x40, 0x20, "timer");
 254         request_region(0x80, 0x10, "dma page reg");
 255         request_region(0xa0, 0x20, "pic2");
 256         request_region(0xc0, 0x20, "dma2");
 257 }
 258
 259 static void __init
 260 lopec_map_io(void)
 261 {
 262         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 263         io_block_mapping(0xb0000000, 0xb0000000, 0x10000000, _PAGE_IO);
 264 }
 265
 266 static void __init
 267 lopec_set_bat(void)
 268 {
 269         unsigned long batu, batl;
 270
 271         __asm__ __volatile__(
 272                 "lis %0,0xf800\n \
 273                  ori %1,%0,0x002a\n \
 274                  ori %0,%0,0x0ffe\n \
 275                  mtspr 0x21e,%0\n \
 276                  mtspr 0x21f,%1\n \
 277                  isync\n \
 278                  sync "
 279                 : "=r" (batu), "=r" (batl));
 280 }
 281
 282 static unsigned long __init
 283 lopec_find_end_of_memory(void)
 284 {
 285         return boot_mem_size;
 286 }
 287
 288 TODC_ALLOC();
 289
 290 static void __init
 291 lopec_early_serial_map(void)
 292 {
 293         struct serial_struct serial_req;
 294
 295         memset(&serial_req, 0, sizeof(serial_req));
 296
 297         /* Setup ioremapped serial port access */
 298         serial_req.line = 0;
 299         serial_req.baud_base = BASE_BAUD;
 300         serial_req.irq = UART0_INT;
 301         serial_req.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
 302         serial_req.io_type = SERIAL_IO_MEM;
 303         serial_req.iomem_base = ioremap(UART0_PORT, 8);
 304
 305 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
 306         /* Configure debug serial access */
 307         gen550_init(0, &serial_req);
 308 #endif
 309
 310         if (early_serial_setup(&serial_req) != 0)
 311                 printk("Early serial init of port 0 failed\n");
 312
 313         /* Assume early_serial_setup() doesn't modify serial_req */
 314         serial_req.line = 1;
 315         serial_req.port = 1;
 316         serial_req.irq = UART1_INT;
 317         serial_req.iomem_base = ioremap(UART1_PORT, 8);
 318
 319 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
 320         /* Configure debug serial access */
 321         gen550_init(1, &serial_req);
 322 #endif
 323
 324         if (early_serial_setup(&serial_req) != 0)
 325                 printk("Early serial init of port 1 failed\n");
 326
 327         serial_req.line = 2;
 328         serial_req.port = 2;
 329         serial_req.irq = UART2_INT;
 330         serial_req.iomem_base = ioremap(UART2_PORT, 8);
 331
 332 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
 333         /* Configure debug serial access */
 334         gen550_init(2, &serial_req);
 335 #endif
 336
 337         if (early_serial_setup(&serial_req) != 0)
 338                 printk("Early serial init of port 2 failed\n");
 339 }
 340
 341 static void __init
 342 lopec_setup_arch(void)
 343 {
 344
 345         TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
 346                   ioremap(0xffe80000, 0x8000), 8);
 347
 348         loops_per_jiffy = 100000000/HZ;
 349
 350         lopec_find_bridges();
 351
 352 #ifdef CONFIG_BLK_DEV_INITRD
 353         if (initrd_start)
 354                 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
 355         else
 356 #elif defined(CONFIG_ROOT_NFS)
 357                 ROOT_DEV = to_kdev_t(0x00ff);
 358 #elif defined(CONFIG_BLK_DEV_IDE)
 359                 ROOT_DEV = to_kdev_t(0x0301);
 360 #else
 361                 ROOT_DEV = to_kdev_t(0x0801);
 362 #endif
 363
 364 #ifdef CONFIG_DUMMY_CONSOLE
 365         conswitchp = &dummy_con;
 366 #endif
 367
 368         lopec_early_serial_map();
 369
 370 #ifdef CONFIG_PPCBUG_NVRAM
 371         /* Read in NVRAM data */
 372         init_prep_nvram();
 373
 374         /* if no bootargs, look in NVRAM */
 375         if ( cmd_line[0] == '\0' ) {
 376                 char *bootargs;
 377                  bootargs = prep_nvram_get_var("bootargs");
 378                  if (bootargs != NULL) {
 379                          strcpy(cmd_line, bootargs);
 380                          /* again.. */
 381                          strcpy(saved_command_line, cmd_line);
 382                 }
 383         }
 384 #endif
 385 }
 386
 387 void __init
 388 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 389               unsigned long r6, unsigned long r7)
 390 {
 391         parse_bootinfo(find_bootinfo());
 392         lopec_set_bat();
 393
 394         isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
 395         isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
 396         pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
 397         ISA_DMA_THRESHOLD = 0x00ffffff;
 398         DMA_MODE_READ = 0x44;
 399         DMA_MODE_WRITE = 0x48;
 400
 401         ppc_md.setup_arch = lopec_setup_arch;
 402         ppc_md.show_cpuinfo = lopec_show_cpuinfo;
 403         ppc_md.irq_cannonicalize = lopec_irq_cannonicalize;
 404         ppc_md.init_IRQ = lopec_init_IRQ;
 405         ppc_md.get_irq = openpic_get_irq;
 406         ppc_md.init = lopec_init2;
 407
 408         ppc_md.restart = lopec_restart;
 409         ppc_md.power_off = lopec_power_off;
 410         ppc_md.halt = lopec_halt;
 411
 412         ppc_md.find_end_of_memory = lopec_find_end_of_memory;
 413         ppc_md.setup_io_mappings = lopec_map_io;
 414
 415 #ifdef CONFIG_VT
 416         ppc_md.kbd_setkeycode = pckbd_setkeycode;
 417         ppc_md.kbd_getkeycode = pckbd_getkeycode;
 418         ppc_md.kbd_translate = pckbd_translate;
 419         ppc_md.kbd_unexpected_up = pckbd_unexpected_up;
 420 #ifdef CONFIG_MAGIC_SYSRQ
 421         ppc_md.ppc_kbd_sysrq_xlate = pckbd_sysrq_xlate;
 422         SYSRQ_KEY = 0x54;
 423 #endif /* CONFIG_MAGIC_SYSRQ */
 424 #endif /* CONFIG_VT */
 425
 426         ppc_md.time_init = todc_time_init;
 427         ppc_md.set_rtc_time = todc_set_rtc_time;
 428         ppc_md.get_rtc_time = todc_get_rtc_time;
 429         ppc_md.calibrate_decr = todc_calibrate_decr;
 430
 431         ppc_md.nvram_read_val = todc_direct_read_val;
 432         ppc_md.nvram_write_val = todc_direct_write_val;
 433
 434 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_ID_MODULE)
 435         ppc_ide_md.default_irq = lopec_ide_default_irq;
 436         ppc_ide_md.default_io_base = lopec_ide_default_io_base;
 437         ppc_ide_md.ide_init_hwif = lopec_ide_init_hwif_ports;
 438 #endif
 439 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 440         ppc_md.progress = gen550_progress;
 441 #endif
 442 #ifdef CONFIG_KGDB
 443         ppc_md.early_serial_map = lopec_early_serial_map;
 444 #endif
 445 }