4 * Xilinx ML300 evaluation board initialization
6 * Author: MontaVista Software, Inc.
9 * 2002 (c) MontaVista, Software, Inc. This file is licensed under the terms
10 * of the GNU General Public License version 2.1. This program is licensed
11 * "as is" without any warranty of any kind, whether express or implied.
14 #include <linux/config.h>
15 #include <linux/init.h>
16 #include <linux/pagemap.h>
17 #include <linux/serialP.h>
19 #include <asm/machdep.h>
21 #include <asm/keyboard.h>
23 #include "xilinx_ocp/xbasic_types.h"
24 extern u32 XWaitInAssert;
26 * The Xilinx drivers use something called XASSERT. It should be
27 * disabled in running systems to save time and space. This is done by
28 * defining NDEBUG when compiling anything that includes
29 * xilinx_ocp/xbasic_types.h. During development, it is handy to leave
30 * NDEBUG off, but by default, the Xilinx code just tight loops. In our
31 * board_init function, we register a handler to be called that prints
32 * out that we hit an XASSERT. In addition, we tell it to not tight
33 * loop by setting XWaitInAssert to zero. This will probably lead to an
34 * Oops and thus a backtrace.
37 /* SAATODO: Make sure NDEBUG is on. */
39 reportXAssert(char *File, int Line)
41 printk(KERN_CRIT "Xilinx OS Independent Code XAssert: %s:%d\n",
43 printk(KERN_CRIT "Code may crash due to unhandled errors.\n");
46 /* Have OCP take care of the serial ports. */
47 struct ocp_def core_ocp[] = {
48 #ifdef XPAR_UARTNS550_0_BASEADDR
49 {UART, XPAR_UARTNS550_0_BASEADDR, 31 - XPAR_INTC_0_UARTNS550_0_VEC_ID,
51 #ifdef XPAR_UARTNS550_1_BASEADDR
52 {UART, XPAR_UARTNS550_1_BASEADDR, 31 - XPAR_INTC_0_UARTNS550_1_VEC_ID,
54 #ifdef XPAR_UARTNS550_2_BASEADDR
55 {UART, XPAR_UARTNS550_2_BASEADDR, 31 - XPAR_INTC_0_UARTNS550_2_VEC_ID,
57 #ifdef XPAR_UARTNS550_3_BASEADDR
58 {UART, XPAR_UARTNS550_3_BASEADDR, 31 - XPAR_INTC_0_UARTNS550_3_VEC_ID,
60 #ifdef XPAR_UARTNS550_4_BASEADDR
61 #error Edit this file to add more devices.
67 {OCP_NULL_TYPE, 0x0, OCP_IRQ_NA, OCP_CPM_NA}
69 #define NR_SER_PORTS (ARRAY_SIZE(core_ocp)-1)
71 /* Called from the end of platform_init(). */
75 #ifdef CONFIG_MAGIC_SYSRQ
76 extern unsigned char pckbd_sysrq_xlate[128];
77 ppc_md.ppc_kbd_sysrq_xlate = pckbd_sysrq_xlate;
82 XAssertSetCallback(reportXAssert);
85 /* Called after board_init from m4xx_map_io(). */
87 board_io_mapping(void)
89 extern struct serial_state rs_table[];
92 /* Remap all the serial ports */
93 for (i = 0; i < NR_SER_PORTS; i++)
94 rs_table[i].iomem_base =
95 ioremap((unsigned long) rs_table[i].iomem_base, 16);
98 /* Called after board_io_mapping from ppc4xx_setup_arch(). */
100 board_setup_arch(void)
102 /* Identify the system */
104 ("Xilinx Virtex-II Pro port (C) 2002 MontaVista Software, Inc. (source@mvista.com)\n");
107 /* Called after board_setup_irq from ppc4xx_init_IRQ(). */
109 board_setup_irq(void)